IEEE Solid-State Circuits Magazine - Fall 2017 - 26

pulse shaping enabled by body bias
control, meeting U.S. Federal Communications Commission spectral
regulation for all emission channels. Last but not least, high-speed
and ULV digital implementation
enabled by FBB further improves
energy efficiency.
By summing up these new system
and design features in the 28-nm FDSOI 1 mm2 SoC, record energy efficiency improving by 16 the state of
the art has been demonstrated (transmitter only: 14pJ/bit, SoC: 24pJ/bit).
The transmitter is compliant with all
the standard requirements.

Conclusions
A short overview of planar UTBB
FD-SOI technologies has been presented, focusing on analog, RF,
mmW, and mixed signal designs.
One of the major arguments of such
technologies is the unprecedented very wide VT tuning range of
~250 mV for FD-SOI versus ~10 mV
for bulk, in addition to very good
analog intrinsic performances. The
new "tuning knob" obtained from the
body ties brings no parasitic effects
on the signal path, which is a very
attractive feature in the case of tuning schemes, as the feedback signal
is under the BOX of the transistors.
The excellent analog performances
and the contained variability enable
very high-performance energy efficient solutions. For RF to mmW
design, atop the previously mentioned aspects, excellent fT , fmax are
available, enabled by deep submicron technology features. The BEOL
in an FD-SOI environment permits
the implementation of high-performance passive devices, despite the
very dense very-large-scale integration constraints. For mixed-signal
and high-speed designs, the major
key parameters are improved variability, remarkable CMOS switches
performance, and reduced parasitic capacitances.
The 28-nm FD-SOI CMOS technology enables flexible and energyefficient SoC solutions for multiple
types of applications in the field

26

FA L L 2 0 17

of Internet of Things (IoT) and 5G
ecosystem [15]. It also permits the
implementation of efficient revisited
tuning and trimming strategies for
process and temperature compensation, as well as for circuit reconfiguration. And finally, FD-SOI permits
to propose simpler circuits based
on body bias tuned inverters that
revisit state-of-the-art evolution.

References

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IEEE SOLID-STATE CIRCUITS MAGAZINE

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About the Author
Andreia Cathelin (andreia.cathelin
@st.com) has been with STMicroelectronics, Crolles, France, since
1998, where she is now a fellow in
Technology R&D. Her major fields of
interest are in the area of RF/mmW/
THz systems for communications
and imaging, where she is leading
advanced design R&D projects. She
is serving on several IEEE conference
committees, including the Executive Committee of the International
Solid-State Circuits Conference and
Steering Committee chair of European Solid State Circuits Conference-European Solid State Devices
Conference (ESSCIRC-ESSDERC). She
received the electrical engineering
degree in 1994 from ISEN Lille and
the Ph.D. degree in 1998 as well as a
habilitation à diriger des recherches
in 2013, both from the University of
Lille, France.
http://www.st.com
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