IEEE Solid-State Circuits Magazine - Fall 2017 - 77

The transconductance efficiency
G m /I D FoM is one of the most important performance metrics for analog
circuit design. It is a measure of how
much transconductance is produced
for a given bias current and is a function of IC. The transconductance
efficiency (or its inverse) appears
in many expressions related to the
power optimization of analog circuits. We actually already have seen
it (or the inverse) in expressions (5),
(7), and (13), derived, respectively,
for constant G m, constant ~ u, or
constant R n .
In the normalized form, the transconductance efficiency is defined as
the actual gate transconductance
obtained at a given IC with respect
to the maximum transconductance
G m = I D / (nU T ) reached in WI [7]
g ms
= G m ·nU T
IC
ID
(m c IC + 1) 2 + 4IC - 1 (14)
.
=
IC· 6m c · (m c IC + 1) + 2@

Ft = G m ,
2rC G

(15)

where C G = C Gi + C Ge is the total gate
capacitance comprising the intrinsic capacitance C Gi, which is linked
to the mobile charges in the channel, and the extrinsic capacitance
C Ge = C GeW ·W, including the overlap
and fringing field capacitances as
shown in Figure 7, which scale with
the transistor width W. Since both
G m and C Gi, are bias dependent, Ft
is bias dependent too. Its variation
with respect to IC is shown in Figure 8. In WI, the mobile charges are
few and the intrinsic gate capacitance
is negligible compared to the extrinsic capacitance so that C G , C Ge .
The bias dependence in WI is mostly
coming from G m. Since in WI G m ? I D

The Transit Frequency Ft

The transit frequency Ft is defined as
the frequency at which the extrapolated small-signal current gain of the
transistor in CS configuration falls
to unity [9]. Ft is a widely used metric for characterizing the high-frequency behavior of a MOSFET because
many performances, such as the gain
at RF and the minimum noise factor,
are directly linked to Ft [9]. A good

100

100
λc = 0.3, αγ = 0.07
λc = 0.3, αγ = 0

10

10

λc = 0, αγ = 0

1

1
λc = 0.3, αγ = 0.07
λc = 0.3, αγ = 0
λc = 0, αγ = 0

0.1
0.01

0.1
100

0.1
1
10
Inversion Coefficient IC

FIGURE 5: The normalized current and W/L ratio versus IC for a constant input-referred
thermal noise resistance R n .

1
0.5

1/

0.2

IC /(λ CI
1

0.1
0.05

Without VS
With VS

C)

The expression in (14), which is continuous from WI to SI and includes the
effect of VS, is plotted in Figure 6. The
figure shows the behavior of g ms /IC
for long-channel devices in which VS
is absent which scales as 1/ IC in SI
(dashed blue curve). For short-channel devices subject to VS, the drain
current becomes a linear function of
the gate voltage, independent of the
transistor length. Hence, the transconductance becomes independent
of the current and length. Since G m
becomes independent of I D or IC,
the G m /I D curve scales like 1/ (m c IC)
in SI instead of 1/ IC when VS is
absent. In essence, the effect of VS

approximation of Ft is given by
[9], [11]

Normalized W/L

The Transconductance
Efficiency G m /I D

Normalized Bias Current ib

FoMs as Design Guidelines

is to degrade the transconductance
efficiency in SI, meaning that more
current is required to reach the same
transconductance obtained without
VS. Nevertheless, irrespective of
the channel length, G m /I D remains
invariant (i.e., g ms /IC = 1) in WI,
since short-channel effects, including VS, have the same effect on G m
than on I D simply because G m is proportional to I D in WI.

Gm . n . UT /ID

The next section will show how
some FoMs can be used as design
guidelines using IC as the main variable to help designers choosing
the appropriate region of operation
for reaching their specs at the lowest power.

1/λC

2

1/λC

0.02
0.001

0.01

0.1

IC

1

10

100

FIGURE 6: g ms /i d versus IC showing the long and short channel asymptotes.

IEEE SOLID-STATE CIRCUITS MAGAZINE

FA L L 2 0 17

77



Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Fall 2017

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