IEEE Solid-State Circuits Magazine - Fall 2017 - 78
between IC = 1 and IC = 1/m 2c where
Ft follows the SI asymptote IC .
Note that once the VS parameter is extracted from the G m /I D as
described in [3], it is therefore easy to
assess the peak Ft for a given technology from Ftspec. It is also interesting
to point out that the denormalized
value of the saturation value of Ft is
given by [12]
CGf
Cif C
ov
Cof
CGo
FIGURE 7: The extrinsic gate capacitances
made of the overlap capacitance C G O and
the fringing field capacitance C G f .
Ftspec
WC ox v sat
=
2rC G
mc
C ox
, v sat ·
,
2rC GeW
Av =
Ftpeak =
and hence G m ? IC, Ft is therefore
also proportional to IC.
Similarly to G m /I D, Ft can be normalized as shown in Figure 8 to
Ftspec defined as the value of Ft on
the WI asymptote corresponding to
IC = 1 [12]. In this way, the normalized transit frequency ft _ Ft /Ftspec
turns out to be equal to g ms, which
is given by (2). Note that Ftspec scales
roughly as 1/L [12]
WLC ox
CG
WLC ox
, Fspec ·
C Ge
I spec4
=
,
2rnU T C GeW L
(17)
which shows that, surprisingly, Ftpeak
does not scale as 1/L anymore [12].
This means that the only way to increase Ftpeak is to increase C ox but
without increasing C GeW [12]. This
observation could explain the recent
slow down of the peak transit frequency progression witnessed in recent years.
Ftspec = Fspec ·
The G m /I D ·Ft FoMs
Both G m /I D and Ft are very important FoMs from an analog/RF design
perspective: the former characterizes the dc performance of a device
while the latter characterizes its
high-frequency performance. However, as is clear from Figures 6 and 8,
there exists a fundamental tradeoff
between the two. Aiming for lowpower operation by targeting a high
G m /I D at small values of IC invariably means compromising in speed
(bandwidth). This is where the FoM
(16)
where Fspec _ 2n 0 U T / (2rL2) .
As illustrated in Figure 8, in SI
and under VS (i.e., for 1/m 2c 1 IC ), Ft
(or ft in normalized form) saturates
to Ftspec /m c (or 1/m c in normalized
form). When increasing the channel
length, i.e., for lower values of m c, the
value of Ft at which VS starts, moves
to higher values and there is a region
defined as the product of the two
formerly defined metrics comes into
the picture. Combining two quantities that have their maxima on the
opposite ends of the IC axis, the
G m /I D ·Ft FoM [13] serves as design
guide to locate the optimum IC.
It can be justified from the smallsignal voltage gain of the CS stage
shown in Figure 9, which is given by
DVout
~
Gm ZL
,- u,
=1 + ~R S C GS
~
DVin
(18)
where ~ u = ~ t ·Z L /R S is the unitygain frequency and G m /C GS has been
approximated by the transit frequency
~ t . It can be shown that the noise factor NF, neglecting the noise of the bias
current source, is given by
NF = 1 +
~u
(NF - 1) ·I b
G ·~
= ZL · m t ,
R S ·c nD
Ib
FoM RF _
∝
1
λC
λC
Ft spec (1)
which is proportional to the product of G m /I b and Ft . Neglecting the
bias dependence of c nD, this product can be expressed in terms of IC
using the normalized G m /I D ·Ft FoM
defined as [7]
g ms ·ft
,
IC
IC
IC
∝
IC
0.1
1
1 10 1 100
λC λ2C
FIGURE 8: The transit frequency Ft versus IC showing the definition of Ftspec . The variables in
parenthesis correspond to the normalized transit frequency.
78
FA L L 2 0 17
(21)
Ib
RS
0.01
(20)
where ft _ g m /c g is the normalized
transit frequency with g m _ G m /G spec
and c g _ C G / (WLC ox). As shown in
Ft (ft )
Ft spec
(19)
An FoM can be defined such that
it maximizes the unity gain bandw idth ~ u while minimizing the
added noise NF - 1 and the bias current I b
fom rf _
Ft peak =
c nD
.
Gm RS
IEEE SOLID-STATE CIRCUITS MAGAZINE
Vin
CGS
M1
Vout Z
L
FIGURE 9: The CS amplifier used for derivation of the G m /I D ·Ft FoM.
Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Fall 2017
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