IEEE Solid-State Circuits Magazine - Fall 2017 - 84

VDD
|HBPF(ω)|

VDD
L, QL

ωRF

ω

L, QL

CL

BPF

-
Core Amp.
(b)

Core Amp.
(a)

CF

+
Vi

CI

C
C = CL+ CO

GmVi

Ydrv
(c)

FIGURE 2: (a) A general block diagram of a tuned RF amplifier. (b) A general schematic of a tuned amplifier with a tank RLC load. (c) The twoport model of an amplifier with a tuned RLC tank load.

YRLC in (1) represents the admittance of the RLC (resistor, capacitor,
and inductor) tank, which is expressed
as YRLC = G L + j (C~ - 1/L~). The susceptance associated with the feedback
capacitance C F appears in the second
term of the input admittance. The second term has a real and an imaginary
part, G in = Re [Yin] and B in = Im [Yin],
which are calculated to be
B F (G m + G L) + B RLC G m
BF
G L2 + (B RLC + B F ) 2
G (G + G ) + B RLC (B RLC + B F )
B F.
B in = L m 2 L
G L + (B RLC + B F ) 2
(2)

G in =

According to (2), the susceptance
B F of the feedback capacitance bears
two key contributions on the conductance and susceptance of the input admittance.
First, we study the B F effect on
the conductance, G in . The tank susceptance, B RLC , becomes negative for
frequencies lower than the tank resonance frequency ~ 0 (= 1/ LC ).
Over this frequency range, if
CF 1

Gm RL C ,
G m R L + 1 eff

(3)

where
C eff = ;`

~ 0 j2
- 1E C,
~

then the conductance G in will be come a negative quantity. The in equality in (3) is easily satisfied at
RF and mm-wave frequencies as the
tank capacitance is typically much
larger than the feedback capacitance,
itself predominantly contributed by

84

FA L L 2 0 17

the parasitics of the transistor [e.g.,
C GD in a metal-oxide-semiconductor (MOS) device or C n in a bipolar
transistor]. If an RLC circuit (i.e.,
input-matching circuit) is present at
the input port, it is possible for the
energy provided by the negative input
conductance of this amplifier to supply all the energy loss associated with
the loss of the matching circuit. If
this happens, a lossless LC circuit will
appear at the input port and the circuit begins to oscillate. The feedback
capacitance thus makes the amplifier
potentially unstable.
Second, an inspection of B in in
(2) reveals that the feedback capacitance appears across the input
port as an equivalent capacitance
C eq = M (~) C F . M represents a frequency-dependent scaling factor, which is
derived to be:
M ^~h = 1 +

Gm RL
,
1 + (R L C eff ~) 2

(4)

It is noted that M essentially presents the generalized high-frequency version of Miller coefficient. The
tank load affects the input reactance
through this Miller capacitance. Therefore, the feedback capacitance couples
the output load back onto the amplifier's input admittance. The design of
input matching circuit for conjugate
matching should thus account for this
parasitic reactance.
Complementa r y M O S (C M O S )
common-source or bipolar commonemitter amplifiers are obvious examples where the gate-drain overlap or

IEEE SOLID-STATE CIRCUITS MAGAZINE

base-collector parasitic capacitances
cause nonzero reverse transmissions.
Therefore, techniques that neutralize
the effect of these capacitances in
the circuit are of great interest. To
help the flow of this article, the following discussion concentrates on
CMOS amplifiers. However, the same
principle can also apply to the bipolar counterparts.

Neutralization Techniques
Neutralization techniques primarily
cancel detrimental effects, described
in the "Tuned Amplifiers" section,
associated with parasitic feedback
capacitance in an amplifier. If the
design constraints allow, the most
straightforward approach is to employ
topologies with no direct capacitive
feedback from the input to the output
of the amplifier. One widely known
topology is the cascode configuration.
As will be explained in the "Cancellation of the Capacitive Feedback" section, an RF cascode amplifier at very
high frequencies loses its promised
advantages. The neutralization techniques thus pr ov ide a powerful
pathway for stabilizing amplifiers at
high frequencies.

Cascode Topology
One topology that provides isolation between the input and output,
thus giving rise to an unconditionally stable amplifier, is the cascode
topology. Figure 3(a) shows the basic
schematic of a tuned cascode amplifier. If being utilized as a low-noise
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