IEEE Solid-State Circuits Magazine - Spring 2014 - 36

Introduction
The vast majority of transistors manufactured each year are MOS transistors
for digital CMOS circuits. However, the
core transistors in leading-edge digital CMOS processes can only handle
small voltages, of the order of 1 V, and
cannot handle significant amounts of

observed in LDMOS transistors but
cannot be simulated by standard
MOS transistor models. (The reasons for the differences in behavior
are detailed below.) Recently, there
have been significant improvements
in LDMOS compact models that
enable the simulation of these and
other important effects. This article
reviews those improvements and
their relevance for circuit design.
First, we summarize the physical
structure and operating principles
of LDMOS transistors. We then detail
general requirements for LDMOS compact models and historic approaches
that have been used for LDMOS modeling. A major portion of the article
is a review of the new SP-HV LDMOS
model, where we describe its physical basis and formulation and demonstrate its advanced capabilities
by comparison to experimental and
technology computer-aided design
(TCAD) data. A short summary is also
provided of the models for RF LDMOS
transistors and then we finish with
some conclusions.

integrated LDMOS devices in such processes routinely handle currents over
50 A and voltages up to 60 V.
The designs of ICs that use
LDMOS transistors have been hampered in the past by a lack of accurate and robust, well-converging,
compact models, primarily because

The designs of ICs that use LDMOS transistors
have been hampered in the past by a
lack of accurate and robust, well-converging,
compact models.
energy. They are able to switch similar
transistors to implement digital logic
operations on a single IC but cannot
perform such useful functions as lifting the windows or controlling the ignition of your car; blasting the RF signal
to your cell phone from the antennas
on those aesthetically designed towers
that dot the modern urban landscape;
or controlling the human interface
features of that phone (screen, keypad, sound). For interaction with,
and control of, the real, analog, highvoltage, high-power world, alternative
electronic components are necessary,
and the LDMOS transistor is widely
used for that purpose, especially as
part of bipolar-CMOS-DMOS (BCD)-type
manufacturing processes. ICs with

of the complexity of the device
behavior, compared to conventional
low-voltage MOS transistors. Quasisaturation [the compression of
output characteristics with increasing gate bias at high gate bias, see
-Figure 1(a)], negative output conductance g o (Figure 1), the expansion
effect [the overcoming of quasisaturation in some devices at high
drain and gate bias (see Figure 2)],
significantly different qualitative
gate capacitance C GG characteristics
over channel length L (see Figure 3
-some LDMOS transistors have a
fixed L but other high-voltage MOS
transistors allow L to be varied),
and negative gate-body capacitance
C GB (Figure 4) are all experimentally

Figures 5-7 show representative
cross sections of some common
types of LDMOS transistors: a highvoltage device, a modern reduced
surface field (RESURF) shallow-trench

102

Data
SP−HV

40

LDMOS Device Structures
and Operation

Data
SP−HV

1

10

|go| (mS)

ID (mA)

30

20

10

0

100
10−1
10−2

0

5

10
VDS (V)
(a)

15

20

10−3

0

5

10
VDS (V)
(b)

15

20

Figure 1:  The measured and modeled I D and g o for a 25-V LDMOS transistor in a 0.25- nm power BiCMOS technology; VGS = 2-8 V in 1-V
steps. (a) Output characteristics and (b) output conductance.

36	

s p r i n g 2 0 14	

IEEE SOLID-STATE CIRCUITS MAGAZINE	



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