IEEE Solid-State Circuits Magazine - Spring 2014 - 8
c ircu it intu itions
Ali Sheikholeslami
Looking into a Node
Welcome to "Circuit Intuitions." This is
the first article of a series that will appear regularly in this magazine. As the
title suggests, each article provides insights and intuitions into circuit design
and analysis. These articles are aimed
at undergraduate students but may serve
the interests of other readers as well. If
you read this article, I would appreciate
your comments and feedback, as well as
your requests and suggestions for future
articles in this series. Please send your
e-mails to ali@ece.utoronto.ca.
(one controlled by the gate-to-source
voltage, v gs, and one by the body-tosource voltage, v bs ) in parallel with
2
1
Req
Req
Req = ∞
Req = ro
4
3
W
What do you see when looking into
a node of a linear time-invariant circuit? Most circuit designers simply
see the Thevenin or Norton equivalent circuit of that node with respect
to ground. We explore this for circuits including transistors. We limit
ourselves to metal-oxide-semiconductor (MOS) transistors for now, but
the procedure outlined here is also
applicable to bipolar transistors.
A well-known, small-signal model
for MOS transistors at low frequencies is shown in Figure 1. This is a
two-port network consisting of two
voltage-controlled current sources,
G
gmbvbs
6
5
RD
RS
Req =
Req = Rs + ro + gmeroRs
7
voc
vin
ro
RS
voc = −gmrovin
isc = voc/Req
FIGURE 2: Library elements 1-8.
IEEE SOLID-STATE CIRCUITS MAGAZINE
RD + ro
1 + gmero
8
isc
Digital Object Identifier 10.1109/MSSC.2014.2315062
s p r i n g 2 0 14
Req
Req
FIGURE 1: An MOS transistor small-signal
model.
8
Req = ro || 1/gm
Req = ro || 1/gme
S
Date of publication: 24 June 2014
Req
Req
D
gmvgs
the transistor's output resistance, ro.
Although this model is quite simple
and can be used directly to analyze
RD
vin
isc
voc
gmvinro
(ro + RD)
voc = iscReq
isc =
Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Spring 2014
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