IEEE Solid-State Circuits Magazine - Spring 2014 - 89

Fully Implantable CI SoC
1.5-V Piezoelectric Sensor Front End (PZFE)
R1f
R

R2ia

-
+

VREF

VREF

R2ib

C2i

VREF

-
+

0.6 V, 9-b
16 kS/s
+
SAR
ADC
-

-
+

C2f

R1i

VCM

-
+

9

Charge Amplifier Programmable-Gain Amplifier ADC Driver (S2D)
Arbitrary Waveform
Current Stimulator

Three-Stage
Decimation Filter

Middle-Ear-Mounted
Piezoelectric Sensor

2f

C1f

Channel
Select

SA

SC

6

Waveform
Select

0.6-V Reconfigurable Sound Processor

VMID

SiC[7:0] SiA[7:0]

8

HV Electrode
Switch Matrix

0.6-V Digital Arbitrary
Waveform Control

E1-E9
ECOM

Configurable
Registers

(a)
Signal
Generator

SoC
Front End

Piezo
Voltage

Audio
Amplifier

Laser
Doppler
Vibrometer

Umbo
Velocity

Probe
Microphone

Ear Canal
Pressure

Speaker

Piezoelectric
Sensor
(b)

Figure 12: A block diagram of the fully implantable cochlear implant SoC.

Ahmad Mirzaei (Pennsylvannia State
University), Yongha Park (Samsung),
Pirooz Parvarandeh (Maxim), and
Takefumi Yoshikawa (Panasonic). Further, I wish to recognize Dave Hulupka (Kapik), and a group of volunteer
graduate students from the University
of Toronto for their videography and
Brad Phillips, Alija Husic (Mira Digital Publishing), and Steve Bonney (S3
Digital Publishing) for the structuring
and formatting of the handout and the
tablet version. Finally, I would like to
acknowledge the vision and encouragement of the ISSCC Conference
Chair Anantha Chandrakasan (MIT), for
his leadership in the realization of the
demonstration-session idea.

	

References

[1]	 N. Kurd et al., "Haswell: A family of IA
22 nm processors," in ISSCC Dig. Tech. Papers, Feb. 2014, pp. 147-149.
[2]	 F. Hamzaoglu et al., "A 1 Gb 2 GHz embedded DRAM in 22 nm Tri-Gate CMOS technology," in ISSCC Dig. Technical Papers,
Feb. 2014, pp. 316-318.
[3]	 S. Rusu et al., "Ivytown: A 22 nm 15Core Enterprise Xeon® processor family," in ISSCC Dig. Tech. Papers, Feb. 2014,
pp. 132-134.
[4]	 A. Payne et al., "A 512×424 CMOS 3D
time-of-flight image sensor with multifrequency photo-demodulation up to
130 MHz and 2 GS/s ADC," in ISSCC Dig.
Tech. Papers, Feb. 2014, pp. 178-180.
[5]	 W. L. Lien et al., "A self-calibrating NFC SoC
with a triple-mode reconfigurable PLL and
a single-path PICC-PCD receiver in 0.11μm
CMOS," in ISSCC Dig. Tech. Papers, Feb. 2014,
pp. 212-214.
[6]	 Y. Hu et al., "3D gesture-sensing system
for interactive displays based on extended-range capacitive sensing," in ISSCC Dig.
Tech. Papers, Feb. 2014, pp. 290-292.

[7]	 R. J. Przybyla et al., "3D ultrasonic gesture recognition," ISSCC Dig. Tech. Papers,
Feb. 2014, pp. 287-289.
[8]	 M. Hamaguchi et al., "A 240 Hz-reportingrate 143×81 mutual-capacitance touchsensing analog front-end IC with 37 dB SNR
for 1mm-diameter stylus," in ISSCC Dig.
Tech. Papers, Feb. 2014, pp. 293-295.
[9]	 N. Miura et al., "A 1mm-pitch 80×80-channel
322 Hz-frame-rate touch sensor with twostep dual-mode capacitance scan," in ISSCC
Dig. Tech. Papers, Feb. 2014, pp. 296-298.
[10]	 A. El-Hoiydi et al., "A 1 V 3 mA 2.4 GHz wireless
digital audio communication SoC for hearingaid applications in 0.18 μm CMOS," in ISSCC
Dig. Tech. Papers, Feb. 2014, pp. 431-433.
[11]	M. Yip et al., "A fully-implantable cochlear
implant SoC with piezoelectric middleear sensor and energy-efficient stimulation in 0.18 μm HVCMOS," in ISSCC Dig.
Tech. Papers, Feb. 2014, pp. 434-436.

-Uming Ko
MediaTek


	 IEEE SOLID-STATE CIRCUITS MAGAZINE	

s p r i n g 2 0 14	

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