IEEE Solid-State Circuits Magazine - Spring 2015 - 16

VDD
CK

M5
Vout

X
CK

M6
Y
M8

P
Vin1

VDD

CB
VP

Vin2

Vin1

Q
M1

(a)

Vin2

(b)

Figure 8: (a) An alternative topology for lower kickback noise and (b) behavior in the precharge mode.

For a large number of clock cycles,
therefore, we predict that the number of zeros at the output, n 0, is
proportional to the area under the
Gaussian probability distribution
function, fX (x), from - 3 to - VS ;
the number of ones, n 1, is proportional to the area from - VS to + 3.
Based on the numbers observed in
the simulations, we can write

#- -3Vs fX (x) dx
-Vs
1- #
fX (x) dx
-3

n0
n1

(16)

and hence compute the variance
of fX (x), which corresponds to the
input-referred noise voltage squared.
The value of VS must be chosen large
enough to ensure n 0 /n 1 substantially departs from unity but not so
large that n 0 or n 1 is excessively
small and statistically insignificant.

Kickback and Supply Transients
The StrongARM latch draws high transient currents from the inputs and
the supply. These transients become
troublesome if a large number of
comparators operate in parallel, as in
a flash analog-to-digital converter.
The "kickback" currents drawn
from the inputs stem from several
mechanisms (Figure 7), exhibiting
both differential and CM components.
The former appear mostly as VP and
VQ fall toward ground at unequal
rates and couple to the inputs through
C GD1 and C GD2 . This effect becomes

s p r i n g 2 0 15

more pronounced as M 1 and M 2 enter
the triode region and their gate-drain
capacitances increase. The CM kickback noise currents are much greater
and occur when M 7 turns on, initially
drawing its drain current from C GS1
and C GS2, and when it turns off, with
CK coupling through C GD7 (. C GS7) to
C GS1 and C GS2 .

The StrongARM
latch draws high
transient currents
from the inputs and
the supply.

It is possible to reduce the kickback noise by clocking the input
devices through their drain path
rather than their source path.
Depicted in Figure 8(a) [9], such a
topology incorporates M 7 and M 8
to control the latch. However, the
kickback noise is lowered at the
cost of a higher input offset because
M 1 and M 2 now operate in the triode region during the amplification
mode. This issue can be avoided by
making M 3-M 4 and M 7-M 8 wide; but,
as illustrated in Figure 8(b), the slow
discharge at A or B in the precharge
mode leads to significant imbalance
between VP and VQ and hence a
large dynamic offset.

IEEE SOLID-STATE CIRCUITS MAGAZINE

The supply transient currents
originate from the precharge action
of S 1-S 4 in Figure 1(b). If CK falls fast,
three of S 1-S 4 momentarily enter the
saturation region (the fourth one is
in the triode region because its drain
voltage is equal to VDD) and pull a
large current from VDD . The key
point here is that designs consuming
a low average power may still draw
high peak currents from the supply,
dictating a low supply impedance.

Questions for the Reader
1) Do VP and VQ in Figure 1(b)
reach 0 V at the end of the regeneration phase?
2) Explain why M 3 and M 4 in
Figure 1(b) can be omitted if the
inputs have rail-to-rail swings.
3) Explain why the coupling through
C GD7 in Figure 7 is less on the rising edge of CK than on the falling edge of CK.
You can share your thoughts with
me by sending an e-mail to razavi@
ee.ucla.edu.

Answers to Last
Issue's Questions
1) Can we use a negative impedance
converter (NIC) in a PA predriver
to cancel the input capacitance of
the output stage?
Since an RF predriver typically
uses a resonant load, the NIC would
cause oscillation. If injection-locking is desired in this stage, a simple
cross-coupled pair suffices.

Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Spring 2015