IEEE Solid-State Circuits Magazine - Spring 2016 - 45

memories (e.g., SRAM or embedded
DRAM) in the last-level cache [5]. As
compared to flash, PCRAM/RRAM is
attractive due to its lower programming voltage and faster write/read
speed. Thus, the PCRAM/RRAM is
attractive as a replacement for NOR
flash for code storage and, more
ambitiously, to replace NAND flash
for data storage [6]. Besides replacing the existing technologies, the
emerging NVM technologies hold the
potential to revolutionize today's
memory hierarchy by adding more
levels in the hierarchy, e.g., creating a storage-class memory layer
between the main memory and the
SSD [7]. In addition, hybrid systems
with emerging memories and mainstream memories are also attractive,
e.g., using RRAM as the cache for
NAND flash [8].

In-Plane MTJ

Emerging NVM Cell Structures
and Device-Level /Engineering
Challenges
Despite the aforementioned attractive features, emerging NVM technologies face challenges from aspects
of process compatibility, manufacturing yield, performance variability, and reliability. In the following,
we will discuss the challenges and
recent trends of each NVM candidate
at the device level.

STT-MRAM Cells
STT-MRAM is based on the magnetic
tunnel junction (MTJ) structure. The
tunneling magnetoresistance (TMR)
ratio (defined as R ap /R p - 1) of the
MTJ is typically small (<200% or
<2X), thereby imposing challenges
for sensing circuit design to sense
the small difference between the on

Perpendicular MTJ

and off states. It is also well known
that a tradeoff exists between the
thermal stability (E a /kT) and critical write current density (J c) due to
an energy barrier between the parallel and antiparallel states of the MTJ.
Given the application demands, the
data retention requirement may be
relaxed to reduce the write power,
e.g., for the last-level cache in which
the data are frequently updated.
The current trend of STT-MRAM
cell design is to switch from the inplane MTJ [Figure 1(a)] to the perpendicular MTJ [Figure 1(b)] to allow
better scalability, longer retention,
and lower J c [9], [10]. The in-plane
MTJ's scalability is limited by the
aspect ratio (length/width in the
lateral dimension) of the cell, as
a sufficient shape anisotropy is
required for thermal stability, while

PCRAM (Mushroom Structure)
Top Electrode

Free Layer

Free Layer

Phase-Change Material

Oxide Tunnel Barrier

Oxide Tunnel Barrier
Insulator

Amorphous
Region

Pinned Layer
Pinned Layer

Bottom Electrode

(b)

(c)

(a)
PCRAM (Pillar Structure)

OxRAM

CBRAM

Top Electrode

Top Electrode

Active Top Electrode

Metal
Oxide
Amorphous
Region

Insulator

Bottom Electrode
(d)

Oxygen
Ion
Filament

Oxygen
Vacancy

Metal
Atoms

Solid
Electrolyte

Filament

Bottom Electrode

Bottom Electrode

(e)

(f)

Figure 1: a schematic of emerging nvm device structures. (a) sTT-mram with in-plane mTJ structure. (b) sTT-mram with perpendicular mTJ
structure, which allows better scalability. (c) Pcram with mushroom structure. (d) Pcram with thermally confined pillar structure for reducing
write current. (e) rram based on oxygen vacancies in the filament in the oxide, referred to as oxram. (f) rram based on metal ions
diffusion from active electrode to form conductive bridge in solid electrolyte, referred to as cbram.

IEEE SOLID-STATE CIRCUITS MAGAZINE

S P R I N G 2 0 16

45
Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Spring 2016
