IEEE Solid-State Circuits Magazine - Spring 2017 - 33

which employed function-specific
chips and later gate arrays.

Research Tool for Real-Time
Video Analysis and VSP Expansion
to HDTV
The VSP system had been used for
real-time video analysis. A real-time
moving-object tracking system and
background separation/filtering [8]
had been implemented. In the latter case, two input video buses were
used for the stereo camera input.
Disparity was calculated block by
block, and the range information
from the cameras could be calculated. A coarse-to-fine block matching was implemented to decrease
mismatches and detect finer contours of the object.
The VSP system was originally
designed for standard-sized digital
television (SDTV) signals. After H.261/
MPEG-2 development, MPEG started to
handle high-definition (HDTV) signals
for communication satellite, broadcasting satellite, terrestrial broadcasts, and DVD applications. The
MPEG-3 project launched but soon
was captured by an extension of
MPEG-2 in 1992. Thus MPEG-2 covers
both SDTV and HDTV signals.
VSP systems also needed to support HDTV signals. The rate conversion from HDTV to SDTV could
be achieved by a one-to-severaltime expansion line by line. HD-VSP
is composed of eight clusters, with
16 component processors for each
cluster [9], and is capable of 2.5 giga
operations/s. The soft wa re compatibility allows for the reuse of
the developed programs by the VSP
system. Figure 6 shows the de ve loped HD-VSP system.
The VSP research team was dispersed in the early 1990s, after we
demonstrated several real-time
programmable HDTV signal processing applications. The VSP approach
had the advantage of prototyping
video processing algorithms in
real time, evaluating coding performance analysis, and doing tradeoff
analysis of performance versus op eration cost for functions such as

Video signal processing requires signal
processor performance about 1,000 times
higher than speech signal processing based on
the sampling rate ratio.

Figure 4: The video processing board of the nec Visualink 1000.

motion compensation. Another advantage was the early adaptation to
the standards evolution.
For the development of the MPEG-2
codec over the asychronous transfer mode VisuaLink 7000, our new
team adopted field programmable
gate arrays (FPGAs) for functional
blocks instead, and Intel 386 processor cards were used for coder/
multiplexer/demultiplexer/decoder
controls for each. FPGAs were available in the 1990s and had been powerful tools for prototyping video
signal processing.
Another team started their contribution to single-chip MPEG-2 encoder LSI development and then the
MPEG-2 decoder system LSI series.
The NEC Electronics EMMA-2 [10]
and EMMA-3 had been widely used
for digital set-top boxes, digital TVs,
DVD players, and hard disk drive/
DVD recorders.
According to the press release
about the new EMMA chips from
NEC Electronics America, Inc, "Since
introducing the world's first system LSI chip for digital broadcast
STBs in 1998, NEC Electronics has
launched numerous market-leading devices based on its E MM A

platform. With a current lineup of
13 devices for STBs, the company
has a promising road map of innovative solutions and aims to reach
US$800 m illion in EMM A-based
sales by 2010."
Thus the VSP initiative that
Takao Nishitani helped us launch
had a long-term impact on video
signal processing products at NEC
and influenced the evolution of
the architecture.

Figure 5: An H.261 codec product, the nec
Visualink 1000.

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