IEEE Solid-State Circuits Magazine - Spring 2017 - 39

1976-1985
* "Onchip High-Voltage Generation in MNOS Integrated Circuits
Using an Improved Voltage Multiplier Technique" by J.F. Dickson, vol. 11, no. 3, pp. 374-378, June 1976, cited by 1,340.
* "CMOS Analog Integrated Circuits Based on Weak Inversion Operations" by E. Vittoz and J. Fellrath, vol. 12, no. 3, pp. 224-231,
June 1977, cited by 797.
* "Short-Circuit Dissipation of Static CMOS Circuitry and Its Impact on the Design of Buffer Circuits" by H.J.M. Veendrick, vol.
19, no. 4, pp. 468-473, Aug. 1984, cited by 771.
* "Time Interleaved Converter Arrays" by W.C. Black and D.A.
Hodges, vol. 15, no. 6, pp. 1022-1029, Dec. 1980, cited
by 736.
* "Electron Mobility in Inversion and Accumulation Layers on
Thermally Oxidized Silicon Surfaces" by S.C. Sun and J.D. Plummer, vol. 15, no. 4, pp. 562-573, Aug. 1980, cited by 594.
* "The TimberWolf Placement and Routing Package" by C. Sechen
and A. Sangiovanni-Vincentelli, vol. 20, no. 2, pp. 510-522, Apr.
1985, cited by 541.
* "Full-Speed Testing of A/D Converters" by J. Doernberg, H. -S.
Lee, and D.A. Hodges, vol. 19, no. 6, pp. 820-827, Dec. 1984,
cited by 476.
* "Electrical Breakdown in Thin Gate and Tunneling Oxides" by
I.-C. Chen, S.E. Holland, and Chenming Hu, vol. 20, no. 1, pp.
333-342, Feb. 1985, cited by 465.
* "High-Speed Compact Circuits with CMOS" by R.H. Krambeck,
C.M. Lee, and H. -F.S. Law, vol. 17, no. 3, 614-619, June 1982,
cited by 456.
* "MOS Operational Amplifier Design-A Tutorial Overview" by
P.R. Gray and R.G. Meyer, vol. 17, no. 6, pp. 969-982, Dec.
1982, cited by 430.
1986-1995
* "Low-Power CMOS Digital Design" by A.P. Chandrakasan,
S. Sheng, and R.W. Brodersen, vol. 27, no. 4, pp. 473-484, Apr.
1992, cited by 3,144.
* "Matching Properties of MOS Transistors" by M.J.M. Pelgrom,
A.C.J. Duinmaijer, and A.P.G. Welbers, vol. 24, no. 5, pp. 1433-
1439, Oct. 1989, cited by 2,990.
* "Alpha-Power Law MOSFET Model and its Applications to CMOS
Inverter Delay and Other Formulas" by T. Sakurai and A.R. Newton, vol. 25, no. 2, pp. 584-594, Apr. 1990, cited by 1,586.
* "1-V Power Supply High-Speed Digital Circuit Technology
with Multithreshold-Voltage CMOS" by S. Mutoh, T. Douseki,
Y. Matsuya, T. Aoki, S. Shigematsu, and J. Yamada, vol. 30, no. 8,
pp. 847-854, Aug. 1995, cited by 1,211.
* "Static-Noise Margin Analysis of MOS SRAM Cells" by E.
Seevinck, F.J. List, and J. Lohstroh, vol. 22, no. 5, pp. 748-754,
Oct. 1987, cited by 1,192.
* "Direct-Conversion Radio Transceivers for Digital Communications" by A.A. Abidi, vol. 30, no. 12, pp. 1399-1410, Dec. 1995,
cited by 1,167.
* "High-Speed CMOS Circuit Technique" by J. Yuan and C. Svensson, vol. 24, no. 1, pp. 62-70, Feb. 1989, cited by 901.

*

*

*

"The Design of Sigma-Delta Modulation Analog-to-Digital Converters" by B.E. Boser and B.A. Wooley, vol. 23, no. 6, pp. 1298-
1308, Dec. 1988, cited by 761.
"A Fast-Settling CMOS Op Amp for SC Circuits with 90-dB DC
gain" by K. Bult and G.J.G.M. Geelen, vol. 25, no. 6, pp. 1379-
1384, Dec. 1990, cited by 754.
"A 10 b, 20 Msample/s, 35 mW Pipeline A/D Converter" by T.B.
Cho and P.R. Gray, vol. 30, no. 3, pp. 166-172, Mar. 1995, cited
by 698.

1996-2005
* "A General Theory of Phase Noise in Electrical Oscillators" by
A. Hajimiri and T.H. Lee, vol. 33, no. 2, pp. 179-194, Feb. 1998,
cited by 2,182.
* "A 1.5-V, 1.5-GHz CMOS Low Noise Amplifier" by D.K. Shaeffer and T.H. Lee, vol. 32, no. 5, pp. 745-759, May 1997, cited
by 1,733.
* "On-Chip Spiral Inductors with Patterned Ground Shields for SiBased RF ICs" by C.P. Yue and S.S. Wong, vol. 33, no. 5, pp.
743-752, May 1998, cited by 1,297.
* "Low-Jitter Process-Independent DLL and PLL Based on selfBiased Techniques" by J.G. Maneatis, vol. 31, no. 11, pp. 1723-
1732, Nov. 1996, cited by 1,141.
* "A Low-Power Low-Noise CMOS Amplifier for Neural Recording
Applications" by R.R. Harrison and C. Charles, vol. 38, no. 6, pp.
958-965, June 2003, cited by 1,138.
* "A 1.5-V, 10-bit, 14.3-MS/s CMOS Pipeline Analog-to-Digital
Converter" by A.M. Abo and P.R. Gray, vol. 34, no. 5, pp. 599-
606, May 1999, cited by 1,075.
* "Design Issues in CMOS Differential LC Oscillators" by A. Hajimiri and T.H. Lee, vol. 34, no. 5, pp. 717-724, May 1999, cited
by 1,057.
* "Simple Accurate Expressions for Planar Spiral Inductances"
by S.S. Mohan, M. del Mar Hershenson, S.P. Boyd, and
T.H. Lee, vol. 34, no. 10, pp. 1419-1424, Oct. 1999, cited
by 1,016.
* "A Study of A Study of Phase Noise in CMOS Oscillatorsphase
Noise in CMOS Oscillators" by B. Razavi, vol. 31, no. 3, pp. 331-
343, May 1996, cited by 1,013.
* "A Dynamic Voltage Scaled Microprocessor System" by T.D.
Burd, T.A. Pering, A.J. Stratakos, and R.W. Brodersen, vol. 35,
no. 11, pp. 1571-1580, Nov. 2000, cited by 1,001.
2005-2015
* "A Low-Power Integrated Circuit for a Wireless 100-Electrode
Neural Recording System" by R.R. Harrison, P.T. Watkins, R.J.
Kier, R.O. Lovejoy, D.J. Black, B. Greger, and F. Solzbacher, vol.
42, no. 1, pp. 123-133, Jan. 2007, cited by 759.
* "Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey" by K. Pagiamtzis and A.
Sheikholeslami, vol. 41, no. 3, pp. 612-727, Mar. 2006, cited
by 738.
* "An 80-tile sub-100-w Teraflops Processor in 65-nm CMOS" by
S.R. Vangal, J. Howard, G. Ruhl, S. Dighe, H. Wilson, J. Tschanz,

IEEE SOLID-STATE CIRCUITS MAGAZINE

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