IEEE Solid-State Circuits Magazine - Summer 2014 - 15

140

130

130

120

120

110

110

(S/N) dB

(S/N) dB

140

100
90

Vs = ±7.5 V
Vs = ±5 V
Vs = ±1 V

80
70
60
0.01

100

0.1

1
10
100
Minimum Area (µm2)

1000

90
fmax 3.4 kHz
fmax 30 kHz
fmax 300 kHz

80
70
60
0.01

10,000

0.1

1
10
100
Minimum Power (µW)

(a)

1000

10,000

(b)

FIguRe 3: Plots of the ultimate power and area of an SC filter versus Dynamic range.

product fT times gm, i.e. the ability
to simultaneously deliver speed and
strength as required for example
by an RF mixer or a simple cascade.
Such a parameter is at least an order
of magnitude higher for bipolar
although the difference shrinks with
scaling. The second is 1/f noise. It
can be qualitatively shown that the
ratio between 1/f noise corner and
fT in an MOS transistor stays fairly
constant with scaling. If we include
the increased statistical variability
associated with scaling, the frequency below which the 1/f noise
cannot be neglected is now hundreds of MHz. Nonetheless, CMOS
has emerged as the winner in the
market even in performance driven
areas like wireless transceivers.
Three reasons for such an outcome,
the first one economical while the
last two technical, are listed below.
■ Unless a cheap solution is found,
a given product cannot penetrate
the mass market. Therefore system and standard are developed
so that such a cheap solution can
be found.
■ At any given time Bi-CMOS is
about one generation behind that
of pure CMOS. This has a small
cost impact in an analog chip but
a devastating one in a digitally
dominated SOC.
■ Technology limits can be overcome by apparently unrelated
strengths. The MOS success came

from its lossless charge storage
capability and the availability of
an ideal switch. Leveraging on
them charge redistribution converter and S.C. filters, to name
but a few, where invented.
In addition to creating better
circuits, concepts that were originally just intuitively grasped were
studied in a more rigorous way. For
example, in that period, Paul and
I published one of the first papers
addressing the fundamental limits
for dynamic range, area and power
of switched capacitor filters. The

conclusions of the study, which can
be generalized to most analog circuits, are shown in Figure. 3 and
outlined below:
■ The kT/C noise limit creates a
quadratic dependence between
area/power and DR.
■ Digital implementations are more
costly at low precision but their
cost increases less with DR.
■ Digital circuits benefit from technology scaling while analog do not.
Even when factoring in the cost of
converting from analog to digital, our
conclusions remain valid. Our results

A
M11

M12
M17
M20

M14
BIAS3

BIAS1

M5
(+)

OUT(+)

M6
M1

IIN

M3

M2

BIAS4

I0

(-)

IIN

OUT(-)

M4

M7
M19

M16

M8
I1

I2

M10

I0

BIAS2

M15

M9
M13

M18
A
FIguRe 4: The push pull "Castello Amplifier".

IEEE SOLID-STATE CIRCUITS MAGAZINE

su m m e r 2 0 14

15
Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Summer 2014
