IEEE Solid-State Circuits Magazine - Summer 2015 - 61

[25]

fin × 2ENOB (Hz-Steps)

1012

1011

1010
2000

2005
Year

2010

2015

Figure 2: fit to speed-resolution product of the top three designs in each year. The red
markers indicate data reported after 2010. The fit line has a slope of 2x/4 years.

because 1) it fits the leading-edge
data points in Figure 1(a) remarkably
well and 2) it is a metric that is cleanly
justified via the fundamental thermal
noise trade-off in analog circuits.
Figure 3 plots FoMS against conversion rate. Similar to Figure 1, we mark
the data points from the past five
years in red to give a feel for recent
advances. First, we note that the
achieved FOMS is highest for low conversion rates. This is expected since
it is generally harder to make a fast
ADC energy efficient. At frequencies

an "ultimate" aperture limit of about
0.1 fs rms . The applicability of such a
quantum-theoretical limit for ADCs
has been questioned in the meantime
[34], and there is no evidence that we
can produce and distribute clocks
with such purity by electrical or optical means at room temperature.

Figure of Merit Trends
Turning our attention back to energy
efficiency, we now investigate trends
in FoMS versus conversion rate and
also over time. We select FoMS here

180

[36]

[37]
[38]

170

FOMS (dB)

performance has so far doubled approximately every four years, which is relatively slow compared to other progress
rates that one may extract (as, for
instance, ADC energy efficiency;
see below). Also note that only two
designs reported after 2010 surpass
the performance of [28] (which is
the peak point for 2010). This may,
indeed, be indicative of an imminent speed-resolution performance
saturation, which is also the conclusion of [19]. It is interesting to note,
however, that such saturation was
already seen by Walden in 1999 [1],
and we have since moved to much
higher levels of performance (thanks
to technology scaling). It is likely
that the data converter community
will eventually find ways to march
on for a number of years, especially
if there are important applications
that demand further progress.
From an application standpoint,
it is important to note that the situation may actually not be as bleak as
often portrayed. The jitter requirement of an ADC strongly depends
on the spectral composition of the
ADC input signal or, equivalently, its
autocorrelation function [24], [29]. In
[30], it was shown that for a typical
wideband signal seen in high-speed
serial links, the jitter requirement
is relaxed by about 12 dB compared
to the above formula that assumes
a sinusoid at fs /2. The difference is
due to the wideband and low-pass
nature of the signal. In yet another
scenario involving wideband digitization for satellite and cable receivers [31]-[33], it can be argued along
similar lines that jitter is less important than other nonidealities due
to the subsequent digital channel
filtering. The proper benchmarking and FoM comparison for such
application-specific ADCs remains
an open topic, and metrics involving
sinusoidal characterization are often
too pessimistic to be useful.
As a final remark, we note that
it is unlikely that ADCs will ever be
affected or limited by Heisenberg's
uncertainty principle. This reference
point was created in [1], suggesting

160
150
140

[39]

130
104

105

106
Flash

107

108
fs (Hz)

Pipeline

SAR

109
∆Σ

1010

1011

Other

Figure 3: fomS versus conversion rate (fs) . The red markers indicate data reported after
2010. Points with solid fill mark time-interleaved designs.

IEEE SOLID-STATE CIRCUITS MAGAZINE

su m m E r 2 0 15

Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Summer 2015