IEEE Solid-State Circuits Magazine - Summer 2016 - 64
Satruration
Mode
Triode
Mode
Body Effect
Reduction
φ3
φ4
D'Arrigo et al. (1983)
Dham et al. (1983)
Umezawa et al. (1992)
Booster
(a)
(b)
Body Bias
(c)
MI
φ1
Figure 1: A switching device structure.
VIN = 2V, VTH = 1V
φ2
T2T T6
4
T1 T3 T5
Dickson (1976)
76)
φ1
φ2
10V
T1 10V
13V
12V
T4
φ1
φ2
T2
φ3
φ4
T3 12V
11V
11V
11V
11V
12V T5 11V
12V
11V
11V
11V
10V T6 11V
13V
Dickson (1980)
0)
Figure 3: Gate overdrive for switching transistors using additional capacitors.
Making Pass Gates Operate
in Triode
QN3
64
SU M M E R 2 0 16
N2
N3
φ1
N3
QP1
φ2
N4
N1
Figure 2: Gate overdrive for switching
transistors.
The supply voltage has been decreased
to reduce the system power. As the
supply voltage decreases, the impact
of the diode's threshold voltage significantly affects the output current
of charge pumps. Even though the
simple diode-connected MOSFET realizes a two-phase clock with a short
time period [3], the threshold voltage
needed to be reduced by means of
circuit design.
One way to do this is to connect
the gate with (n+2)th node rather
than nth node, as shown in Figure 2
[4]. This configuration is applicable to
an ac-dc charge pump running with
a two-phase clock as well. One drawback is the circuit needs to work at a
limited input voltage range. When the
input voltage is higher than a critical
value, the switching transistors cannot be turned off any more, which
would degrade charge transfer efficiency due to a high reverse current.
Another way of making the pass
gates operate in the triode region is by
adding two more phases and auxiliary
local boosting capacitors, as shown
in Figure 3. The gate voltage of the
switching devices can be higher by
Wu et al. (1998)
QN1
QN2
φ1
φ2
- Higher Vgs
- Applicable to dc-dc and ac-dc
- Higher Reverse Current When
Vin is Large
φ1
φ2
- Additional NMOS in
Parallel with a Diode
Connection NMOS
- Overdrive Voltage
Borrowed by the Next
Stage
- Potentially Reversing
Current Could Degrade
the Current Efficiency.
Figure 4: Transfer gate control with additional pass transistors.
more than VTH to eliminate the voltage
loss per stage especially for low voltage operation [5]-[7]. Let's focus on
the transfer gate M1 as shown in Figure 3 [7]. At T1, M1 is fully off. At T2,
U1 goes high, and at T3, U2 goes low.
M1 starts conducting with a low VGS.
At T4, U4 goes high to make M1 operate in the triode region. As a result,
source and drain become equipotential. At T5, U4 goes low to make M1
turn off. At T6, the next stage starts
doing the same as M1 does in the previous half cycle.
Another Vt canceling technique is
as shown in Figure 4 [8]. The switch
is composed of two paths. An additional NMOS is connected in parallel
with a diode connection NMOS. The
overdrive voltage is borrowed by the
next stage using an additional complementary metal-oxide-semiconductor
(CMOS) gate to generate a local high
potential without using a four-phase
clock. However, it is noted that
IEEE SOLID-STATE CIRCUITS MAGAZINE
potentially reversing the current could degrade its efficiency, as noted in
Figure 2.
Reducing the Body Effect
Another interesting idea was provided
by Sawada et al. [9] and Block et al.
[10]. They focused on the body effect
of VTH and tried to reduce it by controlling the body potential. Figure 5
uses PMOS transistors with an isolated N-well per stage, which allows
us to use a low-voltage PMOS because
there are no high-voltage (HV) differences between any two terminals of
gate, drain, source, and bulk [9]. Its
operation with a supply voltage of 1 V
was demonstrated.
In Block's configuration, shown in
Figure 6, in addition to the cross-coupled NMOSFETs per stage, the P-well
is separated per stage and connected
to a node whose potential is lower
than the other one [10]. This ensures
that the parasitic bipolar junction
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