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About the Author
Toru Tanzawa (toru.tanzawa.jp@
ieee.org) is a distinguished member of
technical staff at Micron Memory Japan, Inc. He received the Ph.D. degree
in electrical engineering from The University of Tokyo, Japan, in 2002. He has
been with Toshiba and Micron, where
he has worked on the circuit design of
high-density NAND flash, high-speed,
low-voltage NOR flash, and RF-CMOS
wireless ICs since 1992. He holds 183
granted U.S. patents, has published
42 papers in IEEE conferences and
journals, and wrote the book On-Chip
High-Voltage Generator Design: Design
Methodology for Charge Pumps, second
edition (Springer, 2015) and "Chapter
3: Low Power Memory Design" in Power
Aware Design Methodologies (Kluwer
Academic, 2002). He is a Fellow of the
IEEE with a citation of contributions to
integrated high-voltage circuits.

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