IEEE Solid-State Circuits Magazine - Winter 2014 - 65

Gated Ring Oscillator

Phase Error [1]

Enable

Phase Error [2]

div(t)
ref(t)

Reset
Counters

ref(t)

Count[k]

Logic
Count[k]

div(t)

Quant.
Error[k]

Register
e[k]

ref(t)

e[k]

TDC

e[k]

q[2]

q[1]
-q[1]

-q[0]
11

Digital
Loop Filter

10

out(t)

v[k]

Fout = M.F ⋅ Fref
DCO

div(t)
Nsd[k]

Divider
∆−Σ
Modulator

N[k]

M.F

Figure 2: a digital fractional-N frequency synthesizer utilizing a high-resolution time-to-digital convertor based on a gated-ring oscillator.
[5] G. Taylor and I. Galton, "A mostly-digital variable-rate continuous-time delta-sigma modulator ADC," IEEE J. Solid-State Circuits, vol. 45, no. 12, pp. 2634-2646,
Dec. 2010.
[6] R. B. Staszewski, J. L. Wallberg, S. Rezeq, C.-M. Hung, O. E. Eliezer, S. Vemulapalli, K. C. Fernando, K. Maggio, R. Staszewski, N. Barton, M.-C. Lee,
P. Cruise, M. Entezari, K. Muhammad, and D. Leipold, "All-digital PLL and
transmitter for mobile phone," IEEE J. Solid-State Circuits, vol. 40, no. 12, pp.
2469-2482, Dec. 2005.

ways to perform these functions by
digital means. A key benefit in such
case is to replace the large-area loop
filter capacitor and sensitive analog
blocks with compact digital blocks
which are compatible with fine-line
CMOS digital processes.
The common phase-frequency
detector becomes a time-to-digital
word converter (TDC), the loop filter
is transformed to a digital equivalent,
and oscillator frequency is controlled
by a digital word instead of an analog
voltage or current. A gated ring oscillator (GRO) TDC provides an efficient
means of measuring phase error while
substantially reducing the effect of
quantization noise.
Several circuit techniques to
achieve high-performance digital
fractional-N synthesizers with low
jitter and high PLL bandwidth were

[7] C.-M. Hsu, M. Z. Straayer, and M. H. Perrott, "A low-noise wide-BW 3.6GHz digital delta-sigma fractional-N frequency synthesizer with a noiseshaping time-to-digital converter and quantization noise cancellation," IEEE
J. Solid-State Circuits, vol. 43, no. 12, pp. 2776-2786, Dec. 2008.
[8] M. Z. Straayer and M. H. Perrott, "A multi-path gated ring oscillator TDC
with first-order noise shaping," IEEE J. Solid-State Circuits, vol. 44, no. 4, pp.
1089-1098, Apr. 2009.

Michael H. Perrott

LhV-sscs member angelo Mastrocola, DL Michael perrott, and LhV-sscs chair robert peruzzi
reviewing visuals.

IEEE SOLID-STATE CIRCUITS MAGAZINE

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Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2014

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