IEEE Solid-State Circuits Magazine - Winter 2015 - 13

The XCP is an integral part of
comparators and will be studied in
that role in the next issue.

Questions for the Reader
1) Can we use the NIC in a PA predriver to cancel the input capacitance of the output stage?
2) How does the thermal noise contributed by M 1 and M 2 in Figure 3(b)
to Vout compare to that by a regular XCP?
You can share your thoughts by
sending me e-mail.

Answers to Last Issue's Questions
1) Must we turn off M 1 and M 2 in
Figure 8 as we activate the XCP
even if the circuit is to operate as
an amplifier rather than as a latch?
An input that is changing at a
high rate may affect the decision
made by the latch if M 1 and M 2 are
not turned off. For example, if Vin1 is
less than Vin2 at the beginning of the
clock transition but exceeds Vin2 in

the middle, then the latch decision
is "smeared."
2) A divide-by-two circuit incorporates two instances of a CML
latch with inductive peaking. Can
the resistance in series with the
inductors be reduced to zero?
With a zero resistance, the
divider reduces to an injectionlocked quadrature LC oscillator,
potentially operating at a higher
speed but with a much more limited
lock range.

References

[1] P. Basedeau and Q. Huang, "A 1-GHz 1.5-V
monolithic LC oscillator in 1-μm CMOS,"
in Proc. European Solid-State Circuits
Conf., Sept. 1994, pp. 172-175.
[2] B. De Muer, M. Borremans, M. Steyaert,
and G. Li Puma, "A 2-GHz low-phase-noise
integrated LC-VCO set with flicker noise
upconversion minimization," IEEE J. SolidState Circuits, vol. 35, pp. 1034-1038, July
2000.
[3] W. De Cock and M. Steyaert, "A CMOS
10GHz voltage controlled LC-oscillator
with integrated high-Q inductor," in Proc.
European Solid-State Circuits Conf., Sept.
2001, pp. 498-501.

Discover more.

IEEE Educational Activities

[4] M. A. Sanduleanu and J. P. Frambach,
"1GHz tuning range, low phase noise LC
oscillator with replica biasing commonmode control and quadrature outputs," in
Proc. European Solid-State Circuits Conf.,
Sept. 2001, pp. 506-509.
[5] M. Soyuer, J. K. A. Burghartz, and M. D.
Hulvey, "A 3-V 4-GHz nMOS voltage-controlled oscillator with integrated resonator," IEEE J. Solid-State Circuits, vol. 37,
pp. 2042-2045, Dec. 2002.
[6] A. Mazzanti and P. Andreani, "Class-C harmonic CMOS VCOs, with a general result
on phase noise," IEEE J. Solid-State Circuits,
vol. 43, no. 12, pp. 2716-2729, Dec. 2008.
[7] S. Chatterjee, Y. Tsividis, and P. Kinget, "0.5-V
analog circuit techniques and their application in OTA and filter design," IEEE J. SolidState Circuits, vol. 40, pp. 2373-2387, Dec.
2005.
[8] K. C. Tsai and P. R. Gray, "A 1.9-GHz, 1-W
CMOS class-E power amplifier for wireless communications," IEEE J. Solid-State
Circuits, vol. 34, pp. 962-970, July 1999.
[9] S. Galal and B. Razavi, "10-Gb/s limiting
amplifier and laser/modulator driver in
0.18um CMOS technology," IEEE J. Solid-State
Circuits, vol. 38, pp. 2138-2146, Dec. 2003.
[10] S. Galal and B. Razavi, "40-Gb/s amplifier and ESD protection circuit in 0.18 μm
CMOS technology," IEEE J. Solid-State Circuits, vol. 39, pp. 2389-2396, Dec. 2004.
[11] L. Fanori, A. Liscidini, and R. Castello, "3.3GHz
DCO with a frequency resolution of 150Hz for
all-digital PLL," in Int. Solid-State Circuits Conf.
Dig. Tech. Papers, Feb. 2010, pp. 48-49.

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Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2015
