IEEE Solid-State Circuits Magazine - Winter 2015 - 15

This year, for ISSCC, the theme is "Silicon Systems:
Small Chips for Big Data."
are embedded alongside the digital
circuitry, driving research into the
delivery of locally regulated power
supplies with increasing efficiency,
decreasing die area, and increasing

95.0
90.0
Peak Efficiency (%)

such as health care, machine learning,
and sensor systems will challenge
designers to consider new system
architectures requiring advances in
circuits and technology. ISSCC 2015
showcases novel circuit and system
solutions that open new vistas for
society, providing opportunities for
new lifestyle transformations, all
driven by big data technology.
The conference covers a spectrum
of design approaches in various technical areas and advancements broadly
categorized into analog systems;
analog-digital data conversion systems; communication systems; digital
systems; and innovative topics such
as micromachines and microelectromechanical systems (MEMS), imagers, sensors, biomedical devices, as
well as forward-looking solutions
that may be several years away from
becoming commercial.
Annually, the ten technical subcommittees of ISSCC update their analysis
of industry trends for the benefit of
the community at large. This article
summarizes some of these views in
select technical areas. A more comprehensive trends document will be available at www.isscc.org.

85.0
80.0
75.0
70.0
65.0
60.0

output power, while involving no
external components. As seen in Figure 1, these trends are captured by
movement toward the top-right as
the output-power level increases.

ISSCC2014 → 1 W
ISSCC2013 → 1 W
ISSCC2015 → 10 W
Sta
130
nm
te
SOI + 32 nm,
ISSCC2013 → 5 W
of
the
Deep Trench
Resonant,
Ar t
at 0.35 µm + MIM
ISSCC2013 → 7 W
20
12
Resonant,
90 nm
0.18 µm + MIM
90 nm
Eff
icie SOI + 32 nm
ncy
+ MIM
<->
Po
we
rD
ens
ity
CMOS
32 nm

55.0
50.0
0.1

1

10
100
Power Density (mW/mm2)

1,000

10,000

Figure 1: A comparison of integrated switched-capacitor power converters from ISSCC
papers showing peak efficiency versus power density and output power. As shown in the
top-right quadrant, recent advances achieve much higher power density and output power
without sacrificing efficiency.

Analog
1.E+05

Subcommittee Chair:
Axel Thomsen, Silicon Laboratories,
Austin, Texas, USA

1.E+03
P/fsynq (pJ)

The efficient control, storage, and
distribution of energy are worldwide challenges and increasingly
important areas of analog-circuit
research. While manipulation and
storage of information is efficiently
performed digitally, the conversion and storage of energy is fundamentally performed with analog
circuits. Thus, the key technologies
for power management are predominantly analog. Digital systems
such as microprocessors with multiple cores can reduce their overall
power consumption by dynamically
scaling operating voltage and frequency in response to time-varying
computational demands. For this
purpose, dc-dc voltage converters

1.E+04

1.E+02
1.E+01
1.E+00
1.E-01
10

20

30

40

50
60
70
80
SNDR at Nyquist (dB)

ISSCC 1997-2014
VLSI 1997-2014
FOMW = 5 fJ/conv-step
FOMS = 175 dB

90

100 110 120

Delta-Sigma 2015
Pipeline 2015
SAR 2015

Figure 2: ADC power efficiency (P/fsnyq) as a function of SNDR.

IEEE SOLID-STATE CIRCUITS MAGAZINE

W I N T E R 2 0 15

15
http://www.isscc.org
Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2015
