IEEE Solid-State Circuits Magazine - Winter 2015 - 40
DQ
E
DQ
E
DQ
E
VDD
Mp2
Input Power (dBm)
DQ
E
5
Mp1
Vbias, p
E
Out
Vp
Vm
lp lm
Vm′
Vp′
Mn2
Mn1
lb
E
Mn0
Ck
0
-5
-10
-15
-20
-25
-30
5 10 15 20 25 30 35 40 45 50 55 60 65 70 75
Input Frequency (GHz)
(a)
RB
LT/2
Msw
Phase Noise
(dBc/Hz)
VDD
700 µm/32 µm
RB
LT/2
Cfix
FOM (dBc/Hz)
CT
RCM
LS
M1
48 µm/32 µm
M2
-115
-116
-117
-118
-119
181
MSW On
MSW Off
180
179
178
177
32
34
36
Rbias
Rcm
Vdd
lin
lin
gm
gm Coup. Res
C L
k
L
+
C Vo
-
lin
lin
C L
Coup. Res
Rcm
k
L
+
C Vo
-
Vdd
Rbias
Phase Noise
FOM (dBc/Hz)
(dBc/Hz)
(b)
(c)
38 40 42 44
Frequency (GHz)
46
48
-95
-96
-97
-98
-177
-178
-179
55
56
57
58
59
Frequency (GHz)
60
61
Figure 2. (a) Frequency divider by 4 and measured sensitivity curves, (b) inductor-splitting VcO and measured phase noise and FOM,
and (c) magnetically coupled quadrature VcO and measured phase noise and FOM.
The transistors f T and fMAX increase, though slower than in the past,
ron*Coff, a figure of merit (FOM) for switches, improves correspondingly.
As a consequence, wide-band circuits benefit from scaling to 32 nm.
As an example, a frequency divider-by-four, based on differential pairs
used as dynamic latches, realized in both technology nodes and able to
operate up to 108 GHz, is discussed. The dividers are based on differential pairs operated as dynamic latches. Schematic and measured locking
range are reported in Figure 2(a) [4].
On the contrary, inductors do not improve and capacitors degrade
through scaling, affecting the performances of tuned circuits. As a
consequence, a conventional LC VCO, relying on high-quality factor
tank components, is not expected to improve. In this work, we discuss
a new topology for VCOs, based on inductor splitting, showing low
noise and wide tuning range in ultra-scaled nodes. Architecture and
phase noise/FoM are reported in Figure 2(b) [5].
Finally, ultra-scaled devices display increased flicker noise. This is the
major obstacle to realizing low-phase noise quadrature VCOs at millimeter waves, using a conventional cross-coupling technique. Instead,
we present a ring of two magnetically coupled resonators, where being
oscillation frequency dependent on interstage passive components no
phase noise penalty due to 1/f noise of active components results. Realized prototypes show an outstanding −179-dBc/Hz phase noise FOM
at 1-MHz offset. Arch architecture and phase noise/FOM are shown in
Figure 2(c) [6].
references
[1] B. Razavi, "Gadgets gab at 60 GHz," IEEE Spectrum, vol. 45, no. 2, pp. 46-58,
Feb. 2008.
[2] C.-H. Jan, M. Agostinelli, H. Deshpande, M. A. El-Tanani, W. Hafez, U. Jalan, L.
Janbay, M. Kang, H. Lakdawala, J. Lin, Y.-L. Lu, S. Mudanai, J. Park, A. Rahman,
J. Rizk, W.-K. Shin, K. Soumyanath, H. Tashiro, C. Tsai, P. Vandervoorn, J.-Y. Yeh,
and P. Bai, "RF CMOS technology scaling in high-k/metal gate era for RF SoC
(Continued on p. 43)
40
W i n t e r 2 0 15
IEEE SOLID-STATE CIRCUITS MAGAZINE
Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2015
IEEE Solid-State Circuits Magazine - Winter 2015 - Cover1
IEEE Solid-State Circuits Magazine - Winter 2015 - Cover2
IEEE Solid-State Circuits Magazine - Winter 2015 - 1
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