IEEE Solid-State Circuits Magazine - Winter 2015 - 8

c ircu it intu itions

Ali Sheikholeslami

Process Variation and Pelgrom's Law
Welcome to "Circuit Intuitions!" This is the
fourth article of a column series that appears
regularly in this magazine. As the title suggests,
each article provides insights and intuitions
into circuit design and analysis. These articles
are aimed at undergraduate students but may
serve the interests of other readers as well. If
you read this article, I would appreciate your
comments and feedback, as well as your requests and suggestions for future articles in this
series. Please send your e-mails to ali@ece.
utoronto.ca.

The past three articles were related
to the small-signal operation of MOS
circuits. In this article, we step back
and look at dc operation of a simple
current mirror and how the process
variation can affect the accuracy of
the currents produced. We review this
through a simplified design of a current-based digital to analog converter
(also known as IDAC).
Figure 1 shows a simplified diagram of an IDAC that includes a current mirror and ideal switches. The
current mirror consists of a reference
current, I REF, that feeds into a diodeconnected transistor, M 0, and several identical mirroring branches (M 1
to M N ) . Under ideal conditions, i.e.,
when M 0 to M N are perfectly matched
(and have the same VDS), all the branch
currents (I 1 to I N ) are equal to the
reference current. These currents can
then be added selectively based on a
thermometer-coded digit (b 1 to b N ) to
produce the output current:

where n n is the electron mobility,
C ox is the gate capacitance per unit
area, VTn is the threshold voltage of
where we assume b k ! {0, 1} . Accordthe transistor, and W and L are the
ingly, a "1" contributes fully to the outwidth and the length of the transisput current whereas
tor, respectively. In
a "0" contributes no
the above equation,
current to the outwe have assumed a
In this article, we
put. This equation
square-law relationstep back and look
shows that the outship between the
at dc operation of a
put current is equal
drain current and
simple current mirror
^VGS - VTnh, but the
to the reference curand how the process
arguments we put
rent scaled by the
variation can affect
forward in the rest
sum of the thermomthe accuracy of the
of this article are
eter-coded bits.
currents produced.
also applicable if we
In reality, due to
assume a linear relaprocess variation, I 1
to I N do not match with I REF and
tionship, which is the case in modern
with each other. This will cause the
CMOS processes.
output current to deviate from its
This equation clearly indicates
ideal value. Let us briefly review the
that the drain current is a function of
process variations that cause misthree variables: n n C ox, VT , and W/L.
If, for example, we assume n n C ox =
match in the currents.
600 nA/V 2, VT = 0.3 V, VGS = 0.5 V,
The current of an NMOS tranand W/L = 5, then I DS = 70 nA; howsistor in saturation region can be
ever, when the chip is fabricated,
approximated by
these variables may turn out to be
slightly different than what was
n n C ox W
I DS =
(VGS - VTn) 2,
originally intended. As a result, two
2
L
I OUT =

/ b k I REF =

k=1

I REF

/ b k,

k=1

IOUT
IREF
b1

I1
M0

I2
M2

Digital Object Identifier 10.1109/MSSC.2014.2369331
Date of publication: 11 February 2015

W I N T E R 2 0 15

Figure 1: A simplified diagram of a current DAC (IDAC).

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Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2015