IEEE Solid-State Circuits Magazine - Winter 2015 - 9

adjacent transistors with the same
W/L may exhibit, for example, a
5-mV difference in their threshold
voltages. This threshold variation,
or threshold mismatch, will result
in a difference DI between the two
currents that is 5% of their nominal
value. In other words, DI/I = 0.05.
In general, we treat n n C ox, VT , and
W/L as random variables. Let us now
focus on the effects of VT variations
while we assume the other two variables have no variation.
How could we reduce the variation
of VT so as to reduce the variation
in the current without introducing
changes to the underlying technology?
It was shown in a seminal paper
by Pelgrom et al. in 1989 [1] that, in
any given MOS technology, the variance of VT among adjacent transistors
reduces inversely with the gate area.
This is known as Pelgrom's law:
v 2VT =

A 2VT
,
2WL

where A VT is a constant that depends
only on the process. Since the
threshold mismatch between two
adjacent transistors, DVT , is the difference between two random variables, i.e., DVT = VT1 - VT2, we can
also write Pelgrom's law as follows:
v 2DVT = v 2VT1 + v 2VT2 =

A 2VT
.
WL

Note that this equation holds if we
assume VT1 and VT2 are identical and
independent.
We now apply Pelgrom's law to our
example. Assume the initial v DVT is
6 mV. If we multiply W by a factor of
four while keeping L constant, v DVT
will be reduced by a factor of two,
implying a tighter distribution (or
less variation) among the threshold
voltages of adjacent transistors. Let
us see if this makes intuitive sense.
Assume a transistor with the gate
area of WL has a threshold voltage
VTk, where VTk is a random variable
with an expected value of n VT and a
variance of v 2VT . As shown in Figure 2,
if we put N such transistors in parallel,

D

D
M1

M2

MN

Meq

G

G
W/L
VT 1

W/L
VT 2

W/L
VTN

S

S

NW/L
VTeq

Figure 2: An NW/L transistor exhibits a threshold voltage with the same expected value as
that of a smaller W/L transistor. The variance of the threshold voltage, however, is N times
smaller in the larger transistor.

each with a VT having the same staaccording to Pelgrom's law. This will of
tistics (i.e., having the same average
course increase the area and the load
and variance), we are effectively creatcapacitance of the IDAC, but that is the
ing a transistor with NW as its width
price we pay to average out (reduce) the
and L as its length.
variation among the
The threshold voltoutput currents!
age of the parallel
We now return to
Pelgrom's law states
combination ^VTeqh
the other two random
that the threshold
is expected to be
variables affecting
mismatch between
the average of the
the current: n n C ox
two adjacent
and W/L. Interestindividual threshold
identically drawn
ingly, Pelgrom's law
voltages. In other
transistors reduces
[1] also applies to
words, we can write:
inversely with
these random varithe
gate
area.
N
VTeq = 1 / VTk .
ables: the variations
N k=1
in these two variVTeq is now a new random variables are also reduced by increasing
WL in the same way.
able with the following properties:
In conclusion, Pelgrom's law states
n VTeq = n VT
that the threshold (or other process1
2
2
v VTeq =
v ,
N VT
related) mismatch between two adjacent
where we have assumed the VTk s
identically drawn transistors reduces
are independent. This equation siminversely with the gate area. While we
ply states that when we average N
choose W/L of transistors to achieve a
identical, independent random varitarget bandwidth and power, we choose
WL to maintain accuracy in the face of
ables, the variations of the average
process variation and mismatch.
is lower than the variations of the
individual variables.
Acknowledgement
In the example of the current
I would like to thank Marcel Pelgrom
DAC, we usually begin our design by
for reviewing this article and proassuming a fixed power budget and a
viding feedback.
fixed overdrive voltage ^VGS - VTnh .
This will in turn dictate a fixed current,
References
I REF, and a fixed W/L for the transis[1] M. J. M. Pelgrom, C. J. Duinmaijer, and
A. P. G. Welbers, "Matching properties of
tors. If it were not for the variation,
MOS transistors," IEEE J. Solid-State Cirwe could simply choose the minimum
cuits, vol. 24, no. 5, pp. 1433-1440, Oct.
1989.
L and accordingly find the proper W.
For analysis of transistor circuits, refer to the
However, to reduce the variation among
following:
A. S. Sedra and K. C. Smith, Microelectronic Circuits,
the currents in different branches, we
6th ed. London, U.K.: Oxford Univ. Press, 2010.
will increase both W and L by the same
B. Razavi, Fundamentals of Microelectronics.
Hoboken, NJ: Wiley, 2008.
factor so as to maintain the original
W/L (and hence the original overdrive
voltage) while reducing the mismatch

IEEE SOLID-STATE CIRCUITS MAGAZINE

W I N T E R 2 0 15

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