IEEE Solid-State Circuits Magazine - Winter 2016 - 27

backbone of Nortel's dominance in
the digital-switching arena over decades. The infrastructure and development tools associated with these
devices also enabled hundreds of
custom and semicustom digital devices to be developed through the
internal standard-cell user design
system. Dr. Copeland's tremendous
impact in this area was recognized
with a Distinguished Service Award
from the Canadian Strategic Microelectronics Council in 2014.
Hadaway was motivated to seek
out Prof. Copeland in the early 1980s
to pursue a graduate degree and,
perhaps more importantly, encourage him to renew his association with
the BNR/Nortel technical community,
which started in the 1970s when Prof.
Copeland was a visiting scientist.
Miles was an acknowledged leader in
his field of MOS circuits, and BNR/
Nortel was making a transition from
NMOS to CMOS fabrication technology at the time. There was an opportunity to reevaluate the technology
platform and make recommendations
for new and novel ways to design ICs
for high-speed analog functionality.
Miles graciously agreed to begin this
association by comentoring a graduate student. Hadaway and Prof. Copeland then devised a joint program
of study for Kadaba Lakshmikumar,
who was a Carleton Ph.D. candidate.
Kumar spent considerable time in the
BNR/Nortel facilities working on the
characterization of a 3- n m siliconCMOS technology.
The collaboration was extremely
fruitful, culminating in a publication on the matching properties of
MOS transistors for precision analog
design [6] in 1986. The publication
has been cited often, with a latest
count of 344 papers and six patents, and has been among the ten
most referenced papers of all time
in IEEE publications. It was a crucial
piece of work for BNR/Nortel, as it
laid the groundwork for data convertors using MOS current sources
instead of capacitors as the fundamental conversion element. The convertors enabled much higher speed

Figure 3: A second-generation digital
line terminal device with an embedded
filter-codec.

performance using virtually any silicon fabrication technology, thereby
reducing cost and improving choice
from different manufacturers. This
work influenced many high-speed
analog designs developed in the
years following when Kumar's findings were published.
The early collaborative work also
laid the foundation for many future student, professor, and industry
interactions. BNR/Nortel allocated a
significant budget for university interaction and research. There was
stiff competition for this funding
among academic researchers from
around the world. Prof. Copeland

encouraged graduate students and
his colleagues from the Carleton
Engineering Department to collaborate with BNR/Nortel, and Carleton
garnered a disproportionately large
amount of the university interaction
and research budget because of his
efforts. The large group of Carleton
professors and graduate students
located onsite at BNR/Nortel became
informally known as "Nortel University." Figure 4 is representative of
the leadership group of Nortel scientists and Carleton professors of
Nortel University in the late 1990s.
Throughout the 1980s and 1990s,
Nortel invested heavily in silicon fabrication technology and manufacturing facilities. Technology platforms
evolved from 5- n m NMOS, to 5-, 3-,
1.5-, and 1.2- n m CMOS. Nortel also
offered multiproject wafer silicon
fabrication access to students for all
Canadian universities through the Canadian Microelectronics Corporation
(CMC), located at Queen's University
in Kingston, Ontario. Table 1 provides
a view of the number of student designs (over 3,000) fabricated by Nortel
from 1982 through 1999.
Miles lobbied hard for the creation of the CMC and helped cofound
it to support all university-based

Figure 4: Carleton professors and Nortel MSSs, circa 1998. From left: Tom Smy (Carleton),
Dave Marchesan (Nortel), Dave Walkey (Carleton), Mike Maliepaard, Stefan Szilagyi, Yuriy
Greshishchev, Jonathan Showell, Marika Herod, Bob Hadaway (Nortel), Miles Copeland
(Carleton), Tom McElwee, Jugnu Ojha, Steve Kovacic, Sorin Voinigescu, and Peter Schvan
(Nortel).

IEEE SOLID-STATE CIRCUITS MAGAZINE

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Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2016

IEEE Solid-State Circuits Magazine - Winter 2016 - Cover1
IEEE Solid-State Circuits Magazine - Winter 2016 - Cover2
IEEE Solid-State Circuits Magazine - Winter 2016 - 1
IEEE Solid-State Circuits Magazine - Winter 2016 - 2
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IEEE Solid-State Circuits Magazine - Winter 2016 - Cover3
IEEE Solid-State Circuits Magazine - Winter 2016 - Cover4
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