IEEE Solid-State Circuits Magazine - Winter 2016 - 32

Figure 1: Miles with his students at Carleton in 1977, including (from left): Prof. Chong
Chan, Deepak Roy, Miles, Eric Samson, Chowdhury Rahim (center), Pierre Menard, and
Bupendra Ahuja (on right).

Figure 2: Miles and Duncan Glendinning (both in front) and Lyall Berndt at Carleton in 1984.

Figure 3: Miles at the author's graduation in 1986.

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IEEE SOLID-STATE CIRCUITS MAGAZINE

generous in paying me for consulting and expenses. GE was also trying
to recruit me at the time and took me
out to some of the nicer restaurants
in the area, so I started going to some
of these restaurants on my own and
expensing the meals. In the summer
of 1983 when Miles came down to join
me at GE, I suggested one of these
restaurants for dinner. He demurred
and recommended going to a Denny's instead, and that I scale back my
expenses. After that episode I limited
my meals to Denny's.
Working with Miles at GE was a great
experience, and I learned a lot from
him. We designed RF demodulation
circuits for the AM/FM project in addition to switched-capacitor filters for
the baseband stages. Unfortunately, GE
closed their audio products division,
and the chip was never finished. I completed my thesis on design techniques
for high-frequency switched-capacitor
filters and implemented the fastest
switched-capacitor circuits as of 1985
[3]. Our work analyzed the high-frequency performance of several differential switched-capacitor biquad filter
circuits and compared the analysis to
measured results on test circuits with
good agreement. We also developed
CAD techniques for nonideal finite
bandwidth switched-capacitor circuits,
which were also used in switchedcapacitor biquad comparisons. Figure 3
shows Miles attending my graduation.
I joined Bell Labs in 1984 to work on
digital subscriber loops (DSLs), the predecessor to asymmetric DSL.
After working in industry, I found
Miles's ongoing work useful for some
of my own design problems. For example, I leveraged work he did on cascaded sigma-delta modulators, which
reduced the performance degradation
from finite op amp gain and component mismatch [4]. Miles used a cascaded second-order modulator followed by a first-order stage (shown in
Figure 4) to overcome the limitations
of the MASH architecture of cascaded
first-order modulators. Although both
configurations provide third order, a
second order instead of a first-order
modulator initial stage generates far



Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2016

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