IEEE Solid-State Circuits Magazine - Winter 2016 - 36

MisMatch inversely proportional to the square root of area
n- and p-channel devices, the gate oxide capacitance of the latter
has slightly poorer matching characteristic. This could be due to the
nonuniform distribution of the threshold adjust implant atoms in the
gate oxide.
The mismatch in drain current in the saturation also exhibits an
inverse square-root of area behavior as shown in Figures S3 and S4.
The good agreement between the directly measured mismatch in current with that estimated from the measured mismatches in VT and K
can also be seen.

5.6
4.8
VGS = 1.25 V

4.0
σl
%
I

Matching behavior of MOS devices is summarized below with excerpts
from our work [6]. Figures S1 and S2 show the mismatch in threshold
voltage of n- and p-channel devices as function of dimensions.
* The standard deviation of mismatch is inversely proportional to
the square root of the effective channel area.
* In a well-controlled process, the nonuniform distribution of the fixed
oxide charges has a negligible effect on threshold voltage mismatch.
* The nonuniform distribution of the dopant atoms in the bulk is a
major contributor to the threshold voltage mismatch. The assumption that these atoms follow a Poisson distribution has resulted in
excellent agreement with measurements.
* Devices that use a compensating threshold-adjust implant have a
higher mismatch in threshold voltage due to the differential doping
occurring at the surface. This is the major reason for the significantly
larger mismatch noticed in p-channel devices as compared to nchannel transistors.
* The gate oxide capacitance is quite uniform and hence has little
influence on the threshold voltage mismatch. However, between

VGS = 2.5 V

3.2

W = 6
L
3

2.4
1.2

1.6

1.0

0.8
W=6
L 3

σVT
%
VT

0.8
12
3

0.6
0.4

24
48 24 6
12
12

0.2
0

4

8

0
0

12 16 20 24
1/ L W 102cm-1

28

σI

%

12
3

%
VT

σVT

5.6

20

4.8

VGS = -1.25 V
VGS = -2.5 V

4.0

12
3

3.2

I

1.0

0.4

16

24

28

32

32

W = 6
L
3

24
6
24
48
12
12

12

Figure s3: Drain current mismatch versus dimensions for n-channel
devices. The dots are the estimated values using (2).

1.2

0.6

8

12
6

Figure s1: Threshold voltage mismatch versus dimensions for
n-channel devices.

0.8

4

1/ √ L W 102cm-1

0

24
48 24 6
12 12

2.4

12
6

1.6

W = 6
3
L

12
6

0.8

0.2
0

24 24
48
12 6
12

12
3

12
6

0
0
0

4

8

12

16

20

24

28

32

4

8

12

16

20

24

28

32

1/ √ L W 102cm-1

1/ √ L W 102cm-1
Figure s2: Threshold voltage mismatch versus dimensions for
p-channel devices.

36

W I N T E R 2 0 16

IEEE SOLID-STATE CIRCUITS MAGAZINE

Figure s4: Drain current mismatch versus dimensions for p-channel devices. The dots are the estimated values using (2).



Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2016

IEEE Solid-State Circuits Magazine - Winter 2016 - Cover1
IEEE Solid-State Circuits Magazine - Winter 2016 - Cover2
IEEE Solid-State Circuits Magazine - Winter 2016 - 1
IEEE Solid-State Circuits Magazine - Winter 2016 - 2
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IEEE Solid-State Circuits Magazine - Winter 2016 - Cover3
IEEE Solid-State Circuits Magazine - Winter 2016 - Cover4
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