IEEE Solid-State Circuits Magazine - Winter 2016 - 47

With the third port active in an
amplifier, its port impedance characteristics are important to know. This
port is very different from the signal ports so the use of s-parameters
is not as appropriate at this supply
port. Using conventional circuit analysis is more appropriate, and for this
we begin from the L-mode circuit
model presented in Figure 8.
Keeping a high enough VDS value
to assure that the amplifier operates
in L-mode, the absolute resistance [4]
at the supply port, in the presence of
a maximum available magnitude linear output signal, is given by
J
VOS
K 1 + Venv
R PA ^Venvh = VPA = R L K
I PA
K 1 + IQ
I sig
L
J
VOS N
K 1 + Venv O
O,
= RL K
K 1 + IQ RL O
Venv P
L

N
O
O
O
P
(2)

where VOS is the additional supply
voltage necessary to shift the transistor from resistive operation into
CCS operation and I Q is the quiescent
bias current for the amplifier. Plots
of (2) are provided in Figure 9(a) for
an L-mode (linear) amplifier with a
load resistance of 4 Ω and transistors
with three different values of output
resistance ro . Quiescent bias current
is 150 mA for this amplifier. Yet with
an ideal current source bias, the supply port resistance is always lower
than the load resistance, and even
approaches 0 Ω as the supply voltage
goes to zero. Measurements validate
this behavior. How is this possible?
The answer is provided by looking
at the power amplifier (PA) supply
current, shown in Figure 9(b). Since
the absolute resistance is simply the

30
20
10
0
-10
-20
-30
-40
P-Mode
-50
-60
-70
-60 -50 -40 -30 -20 -10 0
Input RF Power (dBm)
(a)

Supply Voltage (VS)
Load
Resistance
(RL)

Load
Current
(IL)
Device
Resistance
(RDEV)

RF
Input
+
-

Offset
Voltage
(VAMO)

20
(b)

Figure 6: P-mode is a low supply voltage region of amplifier operation: (a) noted on the
Booth chart, where the output power depends on both the supply voltage and on variations
of the input power, and (b) shown as a functional model for P-mode operation where the
transistor operates as a variable resistor.

30
Power Ratiometric Gain (gRP, dB)

impedance of Port 3

Output RF Power (dBm)

curves is derived from the Booth chart
in Figure 3. These gain curves, however, do not clearly show when C-mode
is occurring. It is easy to see when
gain variation and compression happen, but the more fundamental identification of amplifier operating mode is
best done from the Booth chart.

25
20
15
10
5
0
-5
-10
-15
-20
-30

-25

-20

-15 -10
-5
0
Input RF Power (dBm)

Figure 7: A set of amplifier gain curves, here corresponding to the Booth chart of Figure 3.
The bold curve corresponds to a minimum boundary for P-mode.

direct ratio of VPA /I PA, the current
offset due to the quiescent current
causes all line segments from any
actual PA operating condition to the
origin to plot with a higher slope than
the PA current characteristic itself.
This corresponds to lower port resistance. And as the supply voltage gets
very small, the current (ideally) still
flows, which closely approaches a
very small effective resistance.
For C-mode operation, (2) still
applies, with the power saturation
conditions of VOS = 0 and I Q = 0.
In this case, the port resistance
reduces to only being the value of
the load resistance and remains constant at all values of supply voltage.

VPA
IPA

RL
VOUT

Input
Circuit

rO
IQ + ISIG

Figure 8: An amplifier model for evaluating
the impedance of Port 3, the supply input.

This behavior is also validated by
measurements.

Four Principal Gain Measures
This all leads to an interesting question: what is the gain of an amplifier?

IEEE SOLID-STATE CIRCUITS MAGAZINE

W I N T E R 2 0 16

Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2016