IEEE Solid-State Circuits Magazine - Winter 2016 - 59
[18] Tseng et al. (2007)
[22] Harada et al. (1992)
[19] Tsai et al. (2012)
[7] Dickson (1976)
[20] Tsukamoto et al. (2013)
[23] Oto et al. (1983)
[21] Karadi et al. (2014)
[24] Sawada et al. (1995)
I [18], [19]
CW
D [21]
SP
Fib
Para
D [20]
I
Integrated
D
Discrete Cap
D [22]
I [7]
3
I [24]
I [23]
5
6
8
Voltage Gain
12
Figure 10: circuit topology versus voltage gain in literature.
power FETs to have sufficiently
small parasitic capacitance and large
multiplier capacitance. On the other
hand, there have been many designs
with the Falkner-Dickson parallel
cell to have voltage gains as high as
over ten (e.g., [24]). The following
articles in this series focus on the
parallel voltage multiplier, which is
called charge pump afterwards.
References
[1] H. Greinacher, "The ionometer and
its application to the measurement of
radium and Röntgen rays," Phys. Z., vol
15, pp. 410-415, 1914.
[2] E. Marx, "Verfahren zur Schlagpr üfung
von Isolatoren und anderen elektrischen
Vorrich- tungen," German patent 455,933,
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[3] J. D. Cockcroft and E. T. S. Walton, "Experiments with high velocity positive ions.
(I) Further developments in the method
of obtaining high velocity positive ions,"
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136, no. 830, pp. 619-630, June 1932.
[4] J. S. Kilby, "Miniaturized electronic circuits," U.S. patent 3,138,743, 1959.
[5] J. S. Brugler, "Theoretical performance of
voltage multiplier circuits," IEEE J. SolidState Circuits, vol. SSC-6, no. 3, pp. 132-
135, June 1971.
[6] A. H. Falkner, "Generalised Cockcroft-Walton voltage multipliers," Electron. Lett.,
vol. 9, no. 25, pp. 585-586, 13 Dec. 1973.
[7] J. F. Dickson, "On-chip high-voltage generation in MNOS integrated circuits using
an improved voltage multiplier technique," IEEE J. Solid-State Circuits, vol.
SSC-11, no. 3, pp. 374-378, June 1976.
[8] F. Ueno, T. Inoue, I. Oota, and I. Harada,
"Emergency power supply for small computer systems," in Proc. IEEE Int. Conf.
Circuits and Systems, June 1991, pp.
1065-1068.
[9] R. A. Cernea, "Charge pump circuit with
exponential multiplication," U.S. patent
5,436,587, 25 July 1995.
[10] S. Levy, M. Nikolich, I. Alexeff, M. Radar, M.
T. Buttram, and W. J. Sarjeant, "Commercial applications for modulators and pulsed
power technology," in Proc. Conf. Record 12th
Power Modulator Symp., 1992, pp. 8-14.
[11] J. C. Martin, "Nanosecond pulse techniques," Proc. IEEE, vol. 80, pp. 934-945,
June 1992.
[12] G. Reinholds and R. Gleyvod, "Megawatt
HV DC power supplies," IEEE Trans. Nucl.
Sci., vol. 22, no. 3, pp. 1289-1292, 1975.
[13] M. D. Bellar, E. H. Watanabe, and A. C.
Mesquita, "Analysis of the dynamic and
steady-state performance of CockcroftWalton cascade rectifiers," IEEE Trans.
Power Electron., vol. 7, pp. 526-534,
July 1992.
[14] T. Tanzawa, "On-chip high-voltage generator deign," Tutor. IEEE Int. Conf. Circuits
Syst., May 2012.
[15] T. Tanzawa, "Switched capacitor voltage
multipliers," in On-Chip High-Voltage
Generator Design. New York: Springer,
2013, Ch. 2.
[16] T. Tanzawa, "On-chip high-voltage charge
pump deign," Tutor. IEEE Eur. Solid-State
Circuits Conf., Sept. 2014.
[17] T. Tanzawa, "On two-phase switchedcapacitor multipliers with minimum
circuit area," IEEE Trans. Circuits Syst.
I Regul. Pap., vol. 57, no. 10, pp. 2602-
2608, Oct. 2010.
[18] C. Y. Tseng, S. C. Chen, T. K. Shia, and
P. C. Huang, "An integrated 1.2V-to-6V
CMOS charge pump for elecret earphone,"
in Symp. VLSI Circuits Dig. Tech. Papers,
June 2007, pp. 102-103.
[19] J. H. Tsai, C. Y. Tseng, W. K. Tseng, T. K.
Shia, and P. C. Huang, "An integrated 12-V
electret earphone driver with symmetric
Cockcroft-Walton pumping topology for
in-ear hearing aids," in Proc. IEEE Asian
Solid-State Circuits Conf., 2012, pp. 45-48.
[20] S. Tsukamoto, N. Iizasa, K. Yoshitomi,
R. Pokharel, K. Yoshida, R. Hattori, H.
Kanaya, and D. Kanemoto, "Development
of a rectenna for batteryless electronic
paper," in Proc. IEEE Region 10 Conf. TENCON 2013, 2013, pp. 1-4.
[21] R. Karadi and G. V. Pique, "3-phase 6/1
switched-capacitor DC-DC boost converter providing 16V at 7mA and 70.3%
efficiency in 1.1mm3," in IEEE Solid-State
Circuits Conf. Dig. Tech. Paper, 2014, pp.
92-93.
[22] I. Harada, F. Ueno, T. Inoue, and I. Oota,
"Characteristics analysis of Fibonacci
type SC transformer," IEICE Trans. Fundam., vol. E75-A, no. 6, pp. 655-662,
June 1992.
[23] D. Oto, V. Dham, K. Gudger, M. Reitsma,
G. Gongwer, Y. Hu, J. Olund, H. Jones,
and S. Nieh, "High-voltage regulation
and process consideration for high-density 5 V-only E2PROM's," IEEE J. SolidState Circuits, vol. SC-18, pp. 532-537,
Oct. 1983.
[24] K. Sawada, Y. Sugawara, and S. Masui, "An
on-chip high-voltage generator circuit
for EEPROMs with a power supply voltage below 2 V," in Symp. VLSI Circuits Dig.
Tech. Papers, June 1995, pp. 75-76.
[25] M. S. Makowski and D. Maksimovic, "Performance limits of switched-capacitor
DC-DC converters," in Proc. IEEE Power
Electronics Specialists Conf., June 1995,
pp. 1215-1221.
About the Author
Toru Tanzawa (toru.tanzawa.jp@
ieee.org) is a distinguished member
of technical staff at Micron Memory
Japan, Inc. He received the Ph.D. degree in electrical engineering from
The University of Tokyo, Japan, in
2002. He has been with Toshiba and
Micron, where he has worked on the
circuit design of high-density NAND
flash, high-speed, low-voltage NOR
flash, and RF-CMOS wireless ICs
since 1992. He holds 165 granted
U.S. patents, has published 37 papers in IEEE conferences and journals, and wrote the book On-Chip
High-Voltage Generator Design: Design Methodology for Charge Pumps,
Second Edition (Springer, 2015) and
"Chapter 3: Low Power Memory Design" in Power Aware Design Methodologies (Kluwer Academic, 2002). He
is a Fellow of the IEEE.
IEEE SOLID-STATE CIRCUITS MAGAZINE
W I N T E R 2 0 16
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