IEEE Solid-State Circuits Magazine - Winter 2016 - 78

SSCS Santa Clara Valley Chapter Holds Event on Analog Design Topics

The Santa Clara Valley Chapter of
the IEEE Solid-State Circuits Society
(SSCS) welcomed Dr. Mike Perrott
and Dr. B.K. Ajuha to give lectures
on advance topics in analog design.
The talks took place on 30 August
2015 at the Texas Instruments auditorium at Santa Clara, California.
Dr. Perrott's talk was "Fast and
Accurate System-Level Simulation
of Time-Based Circuits," and Dr.
Ajuha's talk was "Evolution of HighSpeed Analog Front End ICs." The
lectures attracted a large number of
participants from both universities
and industry.

"Fast and Accurate System-Level
Simulation of Time-Based Circuits"
by Dr. Mike Perrott
Abstract
Time-based circuits encode analog
information in the edge times of
binary-valued signals. These circuits benefit from the fast transition times and high digital density
offered by advanced CMOS processes and offers a path to using
digital circuits to perform the analog processing of signals. Recent
examples of such circuits include
digital phase-locked loops and
voltage-controlled oscillator-based
analog-to-digital converters. In this
talk, techniques for achieving fast
and accurate system-level simulation of time-based circuits using the
freely available tools of CppSim and
VppSim are presented. These tools
incorporate an efficient protocol
for encoding edge-time information

Digital Object Identifier 10.1109/MSSC.2015.2495888
Date of publication: 21 January 2016

W I N T E R 2 0 16

a jam-packed auditorium of attendees listen to presentations given by Dr. Mike perrot and
Dr. ahuja.

and allow seamless cosimulation of
Verilog and C++ modules along with
nodal analysis of linear networks
with switches. In addition to discussing key techniques employed
by these tools, a software demonstration will be provided with examples including phase-locked loop,
switched capacitor, and power-conversion circuits. The software can
be downloaded at www.cppsim.com.

"Evolution of High-Speed Anolog
Front End ICs" by Dr. B.K. Ahuja
Abstract
Today's systems-on-chip for consumer and communication applications include sophisticated analog
front ends to interface with physical
medium for sensing, signal conversion, processing, storage, and delivery. The talk covers the evolution
of analog functionality and design
techniques used over last three
decades, using CMOS technologies
from 5 um to 16 nm. Analog front

IEEE SOLID-STATE CIRCUITS MAGAZINE

For more information
about upcoming
events hosted by
the SSCS-Santa Clara
Valley Chapter,
please visit http://
sites.ieee.org/
scv-sscs/.

end ICs for telecom codeC/modems,
video AFE, 10-GB ASET local area
network AFE, and G.fast/VDSL
modem for high-speed communications will be discussed. Advances
in design techniques for commonly
used analog building blocks will
also be noted along with challenges
for future.
For more information about
upcoming events hosted by the SSCSSanta Clara Valley Chapter, please
visit http://sites.ieee.org/scv-sscs/.

-Abira Sengupta

http://http:// http://sites.ieee.org/ http://www.cppsim.com http://sites.ieee.org/scv-sscs/

Table of Contents for the Digital Edition of IEEE Solid-State Circuits Magazine - Winter 2016