IEEE Spectrum January, 2012 - 17

called Deeply Depleted Channel
(DDC) transistors, can go toe-totoe with the new alternative designs.
The firm hopes to build a business
licensing a technology it says will
reduce power consumption and boost
performance with minimal changes
to the way transistors are made.
The trouble with today's planar
transistors is twofold: When you

try to make them smaller, they leak
current and waste power. Just as
troubling is that the more you shrink
them, the harder it gets to make them
uniform enough for one transistor
to behave the same as the next.
To some extent, both problems
are caused by unavoidable variations
in the number of dopant atoms in
the silicon. Silicon is traditionally

Poof!

Unknown high voltage transients cause
grief and lost money

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Measurement of sensor signals in industrial settings can provide big
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doped with elements like boron or
phosphorus in order to create and
fine-tune the energy barriers that
both block and permit current to
flow. Electric fields are used to steer
streams of dopants into the silicon.
But as chipmakers have reduced
the size of CMOS transistors, the total
number of dopant atoms in a key part of
the transistor, the channel, gets smaller.
The channel is used to carry current
between the source and the drain, and
it's controlled by a gate that is typically
mounted on top of the channel. The
fewer dopants there are, the stronger
the influence of random fluctuations
in the dopant concentration. These
fluctuations have come to have
a strong impact on a transistor's
electronic properties, resulting in
a high proportion of less-than-ideal
transistors that leak more power or
switch more slowly than designed.
SuVolta hopes to make transistors
less leaky and more predictable by
changing the way their channel regions
are doped. Instead of evenly doping
a transistor channel, the company's
strategy is to lay down the channel
in three layers, each about 50 to 100
angstroms thick and each with a
different concentration of dopant.
Under the influence of the gate's
voltage, current moves primarily
through the topmost layer of silicon,
which contains no dopants at all. The
middle layer allows for some finetuning of the voltage needed to turn the
transistor on or off. And the bottom
layer in SuVolta's transistor is heavily
doped, blocking the gate's electric field
and preventing it from creating a path
through which current could leak.

Using galvanic isolation to eliminate this high voltage makes sensor
measurement straightforward.
Harsh environments need protection.

800-525-8528

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20

na * IEEE SpEctrum * january 2012

lOw PrOFile: In this Deeply Depleted
channel transistor, layers of silicon are doped
to increasing concentrations [top to bottom].
current flows through the top [gray] region
and is blocked from leaking out by the highly
doped bottom layer [dark green]. imAGe: SuvoltA
spectrum.ieee.org
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Table of Contents for the Digital Edition of IEEE Spectrum January, 2012
