IEEE Spectrum July, 2010 - 30

His prayer was answered. Staubach's
receiver collided with a Viking defender
just as the ball arrived but nevertheless
managed to pin the football against his
leg, scoring the touchdown that took the
Cowboys to the Super Bowl. (Imagine
Beckham's long ball beating the goalie.)
Ever since that game, a desperate pass
with little chance of success has been
labeled a Hail Mary.
Thirty years later, the semiconductor
industry threw the equivalent of a Hail
Mary pass when it switched from making microprocessors run faster to putting
more of them on a chip-doing so without any clear notion of how such devices
would in general be programmed. The
hope is that someone will be able to figure out how to do that, but at the moment,
the ball is still in the air.
Why take such a gamble? In short,
because there wasn't much of an alternative.
For decades, microprocessor designers used the burgeoning number of transistors that could be squeezed onto each
chip to boost computational horsepower.
They did this by creating microprocessors
that could carry out several operations at
once-for example, fetching the
next instruction from memory
while the current one was being
executed. And chipmakers continually upped microprocessor
clock rates, something the
diminishing size of transistors
readily allowed.
But around 2003, chipmakers found they could no longer
reduce the operating voltage as
sharply as they had in the past
as they strived to make transistors smaller and faster. That in
turn caused the amount of waste
heat that had to be dissipated
from each square milli meter
of silicon to go up. Eventually
designers hit what they call the
30

NA * IEEE SpEctrum * july 2010

power wall, the limit on the amount of
power a microprocessor chip could reasonably dissipate. After all, a laptop that
burned your lap would be a tough sell.
Designers now accept that although
transistors will still get smaller and
more numerous on each chip, they aren't
going to operate faster than they do today.
(Indeed, peak clock speeds are lower now
than they were five years ago.) And if you
tried to incorporate all those transistors
into one giant microprocessor, you might
well end up with a device that couldn't
compute any faster than the chip it was
replacing, which explains the shift to
assembling them into multiple microprocessor cores instead. Although each
core may have modest computational
abilities, you'll have many of them at
your disposal.
Such novel chips are called multicore
microprocessors-or sometimes manycore microprocessors when a large
number of cores are involved-to distinguish them from traditional single-core
designs. In a sense, the core has become
the new transistor, to borrow a phrase
from Chris Rowen, president and chief
technology officer of Tensilica, in Santa

Clara, Calif. That is, from here on out,
chip designers will concentrate on how
to gang together lots of cores, just as the
previous generation of microprocessor
engineers thought about the circuitry
they were creating at the level of individual transistors.
The trick will be to invent ways for
programmers to write applications that
exploit the increasing number of processors found on each chip without stretching the time needed to develop software or
lowering its quality. Say your Hail Mary
now, because this is not going to be easy.
When the president and CEO of Intel,

Paul S. Otellini, announced in 2004 that
his company would dedicate "all of our
future product designs to multicore environments," why did he label this "a key
inflection point for the industry"? The
answer is clear to anyone familiar with
the many now-defunct companies that
bet their futures on the transition from
single-core computers to systems with
multiple processors working in parallel. Ardent, Convex, Encore, Floating
Point Systems, Inmos, Kendall Square
Research, MasPar, nCUBE, Sequent,
Tandem, and Thinking Machines are just
the most prominent names from a very
long list of long-gone parallel hopefuls.
Otellini was announcing that despite this
sobering record, software applications in
the future will run faster only if programmers can write parallel programs for the
kinds of multicore microprocessors that
Intel and other semiconductor companies have started shipping.
But why is parallel processing so challenging? An analogy helps here. Programming
is in many ways like writing a news story. Potentially,
10 reporters could complete a
story 10 times as fast as a single reporter could ever manage
it. But they'd need to divide a
task into 10 equally sized
pieces; otherwise they couldn't
achieve a full tenfold speedup.
Complications would
arise, however, if one part of
the story couldn't be written
until the rest of it was done.
The 10 reporters would also
need to ensure that each bit
of text was consistent with
spectrum.ieee.org

harry campbell

In 1975, future Hall of Famer Roger Staubach had the football
but little else in a playoff game against the Minnesota Vikings.
Behind by four points at midfield with 24 seconds to go, the
Dallas Cowboys quarterback closed his eyes, threw the ball as
hard as he could, and said a Hail Mary. (For you soccer fans,
this would be like David Beckham taking a shot on goal from
midfield late in injury time.)

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Table of Contents for the Digital Edition of IEEE Spectrum July, 2010