IEEE Spectrum September, 2008 - 39

years In the makIng
1960 Dawon Kahng
and martin m. Atalla
at bell Labs invent
the mOsFet.
1965 Hans becke,
robert Hall, and
Joseph White at
rcA devise the first
gallium arsenide
mOsFet using
silicon dioxide for
the gate insulator.
1979 takashi
mimura at Fujitsu
Laboratories
invents a type of
gallium arsenide
Fet: the highelectron-mobility
transistor (Hemt).

1995 minghwei
Hong and matthias
passlack at bell Labs
deposit a gallium
oxide-gadolinium
oxide insulator on
a III-V substrate.
2001 the author
of this article, peide
Ye, and Glen Wilk
deposit an aluminum
oxide insulator on
a gallium arsenide
substrate using
atomic-layer
deposition.
2005 Intel
announces interest in
III-V semiconductors
for future
microprocessors.
2007 the author
and his colleagues
measure recordbreaking current for
a III-V mOsFet.

time. After 2003, our team continued to study this approach at
Agere Systems, in Allentown, Pa.,
a spin-off of Bell Labs and Lucent
Technologies, where our group
had been moved. The maneuver
succeeded better than we could
have dreamed.
That's not to say we were able
to make a perfectly functioning
MOSFET out of gallium arsenide
straight off. Rather, what stunned
us early on was that atomic-layer
deposition allowed us to apply the
Al2O3 despite having done nothing
to remove the troublesome native
oxide from the gallium arsenide.
The reason, as researchers at the
University of Texas at Dallas have
recently detailed, was that the first
carrier, a molecule called trimethyl
aluminum, eats away at gallium
arsenide's native oxides, which
despite all reasonable precautions
tend to cover the substrate. It's the
atomic-scale equivalent of the mold
on an old porch floor. And as any
homeowner knows, if you want to
repaint those boards, you'd better
scrape off the gunk first.
Using trimethyl aluminum was
like having an all-in-one product
that strips, primes, and paints all at
46

NA * Ieee spectrum * september 2008

once. If you want additional coats-
that is, a thicker film of Al2O3-just
repeat the application of trimethyl
aluminum and the second carrier,
water vapor, in alternating steps.
Once you grow a suitably thick
layer of aluminum oxide on gallium
arsenide in this way, you use traditional lithography to construct the
drain, source, gate, and other components of a MOSFET. No special
processes are required. The rub
is that the transistor you'll end up
with will be a dud: it won't pass any
more current through its channel
than did some of the failed designs
of decades past.
h e n I ca m e t o
Purdue three and
a half years ago, Yi
Xuan, a postdoctoral
investigator in my
research group, and I took on this
problem of dismally poor current
capacity. At about that time, Intel
announced that its engineers were
seriously considering the use of
III-V semiconductors in its future
chips. IBM, too, made its interest in
this technology known. The quest
for speed, it seemed, was driving a
renaissance in research on how to
make III-V semiconductors for digital applications. But despite all this
attention from some of the biggest
guns in the industry, nobody had
a clear idea about how to achieve
sufficient current-carrying capacity
for III-V MOSFETs. The challenge
was greatest for those operated in
enhancement mode, meaning that
electrons flow from source to drain
only when a voltage is applied to the
gate, as is the case for the silicon
MOSFETs found in digital ICs.
Based on published work carried out almost a decade earlier at
Bell Labs and on my own research
on depletion-mode MOSFETs,
which switch off when voltage is
applied to the gate, I realized that
a related III-V semiconductor-
indium gallium arsenide-would
serve better for the channel. In this
compound, indium atoms substitute
for galliums to a degree that can be
adjusted arbitrarily. That is, you can
have mostly indium atoms, mostly
gallium atoms, or a 50:50 mix of the
two bonding to the arsenic atoms.
Tinkering with the indium

content allowed us to engineer
the substrate's electronic properties as required, instead of trying to work around the givens of
a particular material. After much
experimentation, we settled on a
composition that had a 65:35 ratio
of indium to gallium. With it we
were able to build a MOSFET that
carried more than 1 ampere per
millimeter of channel width-the
highest current density ever produced in four decades of work
on gallium arsenide MOSFETs.
Indeed, it was so large that it initially sent our semiconductor
parameter analyzer off scale!
One well-known diff iculty
with this approach is that indium
gallium arsenide has very poor
mechanical properties, so poor
that it would be problematic, if
not impossible, to use it to make
wafers. Pure gallium arsenide
is much more robust. Our wafer
supplier, a UK-based company
called IQE, was able to overcome
this hurdle by growing a thin
layer of indium gallium arsenide
on a thick base of indium phosphide. These two compounds
have crystal lattices of similar
sizes, so they bond reasonably
well together. And the mechanical properties of indium phosphide, while not ideal, proved
good enough to allow us to construct various test transistors.
Passlack and his colleagues
at Freescale Semiconductor and
the University of Glasgow have
also been experimenting with
indium gallium arsenide over the
past few years, using a gallium
oxide-gadolinium oxide insulator. Hong, who is now at National
TsingHwa University in Taiwan,
continues work on this combination as well. Although such
MOSFETs have shown a reasonably good ability to carry current,
they would be difficult to manufacture. The problem is that they
require two applications of a highvacuum deposition technique
called molecular-beam epitaxy:
one to lay down the indium gallium arsenide and then a second to
coat it with the gate oxide. Doing
molecular-beam epitaxy twice, all
the while keeping things under
high vacuum, is possible in the
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Table of Contents for the Digital Edition of IEEE Spectrum September, 2008