IEEE Spectrum September, 2008 - 40
lab, but it would be a challenge for
industrial-scale production.
Research groups at the National
University of Singapore and at IBM
are pursuing yet another design that
has lately shown promise, one that
uses chemical means to add a layer
of amorphous silicon between the
semiconductor and the gate insulator. This approach resembles a strategy that was attempted two decades
ago and is similar to work going on
now at the University of Texas at
Austin and at the State University
of New York in Albany.
What's more, some researchers
are looking to build a very different
kind of III-V field-effect transistor
suitable for digital applications,
one that can function without a
gate oxide at all. These devices
operate similarly to HEMTs in
that a semiconductor provides
the barrier between the gate and a
highly conductive, undoped channel. Intel and UK-based QinetiQ in
particular have over the past few
years achieved impressive performance with a transistor fashioned
this way using an indium antimony channel. Jesús A. del Alamo
and his colleagues at MIT are also
investigating how to make such
HEMT-like transistors smaller
and less prone to gate leakage so
that they may one day serve for
digital applications.
Indeed, much work goes on
around the world on bringing
III-V semiconductors into what
has long been the sole domain of
silicon. In addition to the efforts
being mounted in industry, academic teams have formed centers
of research at the University of
California at Santa Barbara, the
University of Glasgow, and the
University of Tokyo, specifically
to carry out these investigations.
onsiderable progress will yet have to
be made before any
of these new kinds
of field-effect transistors replace their slower silicon
counterparts in microprocessors,
memory chips, and other digital ICs.
In particular, device engineers will
have to optimize many parameters
besides current-carrying capacity and gate leakage. They'll also
c
www.spectrum.Ieee.org
want these transistors to be able to
operate at low voltages, for instance,
so as to reduce another troublesome source of heating: the power
expended at the moment the transistors switch states. (Indium-rich
indium gallium arsenide holds great
promise in this regard.) Designers
will also want to ensure that very
little current flows when a transistor is nominally "off," so that
power isn't expended-and heat
isn't generated-uselessly. Doing
so, all while making these transistors as tiny as today's silicon wonders, will be no small feat.
In addition, it is likely that
manufacturers will have to find
ways to place III-V semiconductors on top of a silicon wafer. That
is, chip makers will surely aim to
use the compound semiconductors
only where they're needed rather
than trying to replace silicon
entirely, although getting all
these materials to work properly
together turns out to be a tricky
undertaking and the subject of
much research.
One reason for keeping as much
silicon as possible around is that it
has considerably better physical
properties for making the large
wafers used in semiconductor manufacturing. Also, silicon is cheap
and environmentally friendly,
whereas gallium arsenide is expensive and, because it contains arsenic, potentially quite toxic.
Another reason not to expect
an all-gallium arsenide microprocessor anytime soon is that
III-V semiconductors can speed
up only half the transistors in a
CMOS chip: the n-channel ones,
which carry current in the form
of negative charges-electrons.
CMOS integrated circuits require
a combination of both n-channel
and p-channel MOSFETs, which
together draw power only when
they switch states, such as when
an n-channel transistor turns on
and the p-channel transistor that's
wired in series with it turns off.
When not switching between states,
such a complementary pair draws
no power, which is what makes
CMOS chips so energy efficient.
Although gallium arsenide
allows electrons to move through
it especially easily, it doesn't offer
any advantage over silicon for positive charge carriers-the "holes,"
which are sites in the semiconductor's crystal lattice that are deficient in outer-shell electrons. So
it would be very difficult to make
a high-performance p-channel
MOSFET using gallium arsenide or another III-V compound.
The current consensus is that
the semiconductor industry will
probably employ germanium for
those transistors. The Duallogic
academia-industry consortium in
Europe, for example, is working
to combine germanium and III-V
semiconductors in this way.
The III-V dev ices that my
Purdue colleagues and I have
recently constructed represent a
whopping leap forward, as these
MOSFETs are both easy to fabricate and able to carry record currents. The competing designs offer
some attractive features too. Still,
many barriers stand in the way of
their widespread use. In particular, chip makers will have to learn
to mix and match some very different kinds of semiconductors on
a single wafer. Perhaps chip makers will have to weave together a
patchwork quilt of indium gallium arsenide and germanium on
a bed of silicon, or maybe it will
be something even more complicated. But if there's any lesson to be
drawn from the past four decades
of dizzying advances in computing power, it's that this industry
thrives on a challenge.
o
To ProbE FurThEr Details of the
author's work in this area are available in "high-Performance InversionType Enhancement-Mode InGaAs
MoSFET With Maximum Drain
Current Exceeding 1 A/mm," by Y.
Xuan, Y.Q. Wu, and P.D. Ye, IEEE
Electron Device Letters 29:294,
April 2008.
To learn more about the use of a
gallium oxide-gadolinium oxide insulator on a III-V substrate, see "high
Mobility III-V MoSFET Technology"
by M. Passlack, r. Droopad, K.
rajagopalan , J. Ab r ok wah, P.
Zurcher, r. hill, D. Moran, X. Li, h.
Zhou, D. Macintyre, S. Thoms, and I.
Thayne at http:// www.gaasmantech.
org/Digests/2007/2007%20Papers/
12c.pdf.
september 2008 * Ieee spectrum * NA
47
http://http://
http://www.gaasmantech
http://www.spectrum.Ieee.org
Table of Contents for the Digital Edition of IEEE Spectrum September, 2008
IEEE Spectrum September, 2008 - Cover1
IEEE Spectrum September, 2008 - Cover2
IEEE Spectrum September, 2008 - 1
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IEEE Spectrum September, 2008 - Cover3
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