August 09 ElectroIndustry - 11

Standards for Carbon Nanotubes Vital for NextGeneration Electronics BRENT SEGAL PHD, UNITED STATES NATIONAL COMMITTEE TECHNICAL ADVISOR TO IEC TC 113 Gordon Moore, co-founder of Intel, stated in 1965 that since the invention of the integrated circuit in 1958, the number of transistors that could be placed inexpensively on an integrated circuit increases exponentially, doubling about every two years. This became known as “Moore’s Law.” Forty years later, however, Moore himself declared the end of Moore’s Law, which signaled a fundamental shift in the dynamics of processor technology progress. Gone were the days of strict scaling and welcomed were the days of even more diversity. Consider, for example, that more than 10 billion ARM processors are currently shipped to Intel processors. As need dictates ever-increasing memory, the desire for new innovations to reduce cost while increasing performance and decreasing power consumption have reached a crescendo. Silicon-processing technology, long considered to be “mature,” has expanded accordingly with materials now ranging from previously forbidden elements, such as cobalt and nickel, to more exotic compounds, such as lanthanide. The concept of using “molecules” as building blocks for integrated circuits would seem to be a natural extension for an industry always hungry for innovation with cost and power reduction. Enter carbon nanotubes. Carbon nanotubes (CNTs) were first reported in 1991 by Sumio Iijima, a scientist with NEC Corporation. Their unique cylindrical structure, coupled with electrical and thermal properties, generated an excitement in the materials science community almost immediately. Every imaginable test was performed to measure mechanical strength, electrical conductivity, resistance to heat, etc. Nearly all of these research efforts focused on individual, isolated, single-walled nanotubes with extrapolation about what could be done if five to ten billion nanotubes were hooked up into a circuit built from the bottom up rather than the top down. Indeed, for a number of years, research continued. CNTs promised to disrupt the natural progression of standard electronics—specifically Moore’s Law. Many of the researchers NANOTECHNOLOGY were not even aware of the real integration issues that lay ahead within the realm of integrated circuit electronics. Ultra-Large Scale Integration Processes Promises of the integration of nanomaterials—and especially molecules—into electronics began in 1999. Thomas Rueckes PhD and Charles Lieber PhD first proposed the idea of exploiting unique mechanical properties of CNTs in large-scale memory integration efforts. Within two years, Dr. Rueckes had started Nantero, a company specifically focused on making the concept a reality. Reality came in the form of complementary metaloxide semiconductor (CMOS) integration. The Nantero team quickly realized that integration of molecules could not be accomplished easily outside of the confines of the normal CMOS infrastructure, but rather needed a hybrid approach. The idea of incorporating nanomaterials into CMOS to take advantage of bulk properties in conjunction with high-level modeling, design, fabrication, and testing of CMOS has allowed a push toward full incorporation of carbon nanotubes in both memory and logic devices. Such approaches offer the promise of three-dimensional integration for memory, logic, and other high-level functionality into a monolithic platform, where traditional leakage current, transmission line requirements, and heat dissipation restrictions fall aside for many generations of electronics to come. Standards are the Key As the continued march towards integration of CNTs and nanomaterials in large-scale electronics continues, one of the key requirements is standardization. Just as raw tungsten ore must first be processed before it can find its way into chip-wiring layers in CMOS, the same is true for “as grown” CNTs destined to eventually make memory bits in a stacked-memory array. They must first undergo processing and standardization before delivery to the CMOS fabricator. Understanding the purity, diameters, lengths, etc., of these raw materials is a first step toward making their widespread use acceptable in the electronics industry. With this motivation, IEC TC 113 has taken up the task of documenting characteristics of nanomaterials for electronics as a focal point. To bolster these efforts, TC 113 has also been working with the IEEE 1784 working group, whose mission is to develop a standard for largescale integration of nanomaterials into electronics. TC 113 efforts include scientists, researchers, and engineers from more than a dozen countries providing expertise on metrology, integration, design, and testing, with the aim of producing standards-enabled products that will act as a guide, if not a beacon, for nextgeneration electronics. ei August 09 • NEMA electroindustry 11

August 09 ElectroIndustry

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